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d3b8614860
``` ---------------------------------------- define i32 @src(i16 %x, i1 %b) { %0: %z = sext i16 %x to i32 %p = cttz i32 %z, %b ret i32 %p } => define i32 @tgt(i16 %x, i1 %b) { %0: %z = zext i16 %x to i32 %p = cttz i32 %z, %b ret i32 %p } Transformation seems to be correct! ``` https://alive2.llvm.org/ce/z/evomeg Reviewed By: spatel Differential Revision: https://reviews.llvm.org/D101764
121 lines
4.2 KiB
LLVM
121 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -S -instcombine | FileCheck %s
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declare i32 @llvm.cttz.i32(i32, i1)
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declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>, i1)
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declare void @use(i32)
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define i32 @cttz_zext_zero_undef(i16 %x) {
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; CHECK-LABEL: @cttz_zext_zero_undef(
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; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 true), !range [[RNG0:![0-9]+]]
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; CHECK-NEXT: [[TMP2:%.*]] = zext i16 [[TMP1]] to i32
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%z = zext i16 %x to i32
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%tz = call i32 @llvm.cttz.i32(i32 %z, i1 true)
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ret i32 %tz
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}
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define i32 @cttz_zext_zero_def(i16 %x) {
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; CHECK-LABEL: @cttz_zext_zero_def(
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; CHECK-NEXT: [[Z:%.*]] = zext i16 [[X:%.*]] to i32
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; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[Z]], i1 false), !range [[RNG1:![0-9]+]]
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; CHECK-NEXT: ret i32 [[TZ]]
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;
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%z = zext i16 %x to i32
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%tz = call i32 @llvm.cttz.i32(i32 %z, i1 false)
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ret i32 %tz
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}
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define i32 @cttz_zext_zero_undef_extra_use(i16 %x) {
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; CHECK-LABEL: @cttz_zext_zero_undef_extra_use(
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; CHECK-NEXT: [[Z:%.*]] = zext i16 [[X:%.*]] to i32
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; CHECK-NEXT: call void @use(i32 [[Z]])
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; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[Z]], i1 true), !range [[RNG1]]
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; CHECK-NEXT: ret i32 [[TZ]]
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;
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%z = zext i16 %x to i32
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call void @use(i32 %z)
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%tz = call i32 @llvm.cttz.i32(i32 %z, i1 true)
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ret i32 %tz
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}
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define <2 x i64> @cttz_zext_zero_undef_vec(<2 x i32> %x) {
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; CHECK-LABEL: @cttz_zext_zero_undef_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 true)
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; CHECK-NEXT: [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[TMP2]]
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;
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%z = zext <2 x i32> %x to <2 x i64>
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%tz = tail call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %z, i1 true)
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ret <2 x i64> %tz
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}
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define <2 x i64> @cttz_zext_zero_def_vec(<2 x i32> %x) {
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; CHECK-LABEL: @cttz_zext_zero_def_vec(
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; CHECK-NEXT: [[Z:%.*]] = zext <2 x i32> [[X:%.*]] to <2 x i64>
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; CHECK-NEXT: [[TZ:%.*]] = tail call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[Z]], i1 false)
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; CHECK-NEXT: ret <2 x i64> [[TZ]]
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;
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%z = zext <2 x i32> %x to <2 x i64>
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%tz = tail call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %z, i1 false)
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ret <2 x i64> %tz
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}
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define i32 @cttz_sext_zero_undef(i16 %x) {
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; CHECK-LABEL: @cttz_sext_zero_undef(
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; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 true), !range [[RNG0]]
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; CHECK-NEXT: [[TMP2:%.*]] = zext i16 [[TMP1]] to i32
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%s = sext i16 %x to i32
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%tz = call i32 @llvm.cttz.i32(i32 %s, i1 true)
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ret i32 %tz
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}
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define i32 @cttz_sext_zero_def(i16 %x) {
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; CHECK-LABEL: @cttz_sext_zero_def(
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; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[X:%.*]] to i32
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; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP1]], i1 false), !range [[RNG1]]
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%s = sext i16 %x to i32
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%tz = call i32 @llvm.cttz.i32(i32 %s, i1 false)
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ret i32 %tz
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}
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define i32 @cttz_sext_zero_undef_extra_use(i16 %x) {
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; CHECK-LABEL: @cttz_sext_zero_undef_extra_use(
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; CHECK-NEXT: [[S:%.*]] = sext i16 [[X:%.*]] to i32
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; CHECK-NEXT: call void @use(i32 [[S]])
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; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[S]], i1 true), !range [[RNG1]]
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; CHECK-NEXT: ret i32 [[TZ]]
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;
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%s = sext i16 %x to i32
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call void @use(i32 %s)
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%tz = call i32 @llvm.cttz.i32(i32 %s, i1 true)
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ret i32 %tz
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}
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define <2 x i64> @cttz_sext_zero_undef_vec(<2 x i32> %x) {
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; CHECK-LABEL: @cttz_sext_zero_undef_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 true)
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; CHECK-NEXT: [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[TMP2]]
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;
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%s = sext <2 x i32> %x to <2 x i64>
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%tz = tail call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %s, i1 true)
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ret <2 x i64> %tz
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}
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define <2 x i64> @cttz_sext_zero_def_vec(<2 x i32> %x) {
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; CHECK-LABEL: @cttz_sext_zero_def_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i32> [[X:%.*]] to <2 x i64>
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; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[TMP1]], i1 false)
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; CHECK-NEXT: ret <2 x i64> [[TMP2]]
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;
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%s = sext <2 x i32> %x to <2 x i64>
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%tz = tail call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %s, i1 false)
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ret <2 x i64> %tz
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}
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