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llvm-mirror/test/Transforms/InstCombine/dont-distribute-phi.ll
Juneyoung Lee b23e310c99 [InstCombine] Fully disable select to and/or i1 folding
This is a patch that disables the poison-unsafe select -> and/or i1 folding.

It has been blocking D72396 and also has been the source of a few miscompilations
described in llvm.org/pr49688 .
D99674 conditionally blocked this folding and successfully fixed the latter one.
The former one was still blocked, and this patch addresses it.

Note that a few test functions that has `_logical` suffix are now deoptimized.
These are created by @nikic to check the impact of disabling this optimization
by copying existing original functions and replacing and/or with select.

I can see that most of these are poison-unsafe; they can be revived by introducing
freeze instruction. I left comments at fcmp + select optimizations (or-fcmp.ll, and-fcmp.ll)
because I think they are good targets for freeze fix.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D101191
2021-05-06 09:29:52 +09:00

82 lines
2.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
;
; This test ensures that InstCombine does not distribute And over Xor
; using simplifications involving undef.
define zeroext i1 @foo(i32 %arg) {
; CHECK-LABEL: @foo(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[ARG:%.*]], 37
; CHECK-NEXT: br i1 [[CMP1]], label [[BB_THEN:%.*]], label [[BB_ELSE:%.*]]
; CHECK: bb_then:
; CHECK-NEXT: call void @bar()
; CHECK-NEXT: br label [[BB_EXIT:%.*]]
; CHECK: bb_else:
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[ARG]], 17
; CHECK-NEXT: br label [[BB_EXIT]]
; CHECK: bb_exit:
; CHECK-NEXT: [[PHI1:%.*]] = phi i1 [ [[CMP2]], [[BB_ELSE]] ], [ undef, [[BB_THEN]] ]
; CHECK-NEXT: [[XOR1:%.*]] = xor i1 [[CMP1]], true
; CHECK-NEXT: [[AND1:%.*]] = and i1 [[PHI1]], [[XOR1]]
; CHECK-NEXT: ret i1 [[AND1]]
;
entry:
%cmp1 = icmp eq i32 %arg, 37
br i1 %cmp1, label %bb_then, label %bb_else
bb_then:
call void @bar()
br label %bb_exit
bb_else:
%cmp2 = icmp slt i32 %arg, 17
br label %bb_exit
bb_exit:
%phi1 = phi i1 [ %cmp2, %bb_else ], [ undef, %bb_then ]
%xor1 = xor i1 %cmp1, true
%and1 = and i1 %phi1, %xor1
ret i1 %and1
}
define zeroext i1 @foo_logical(i32 %arg) {
; CHECK-LABEL: @foo_logical(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[ARG:%.*]], 37
; CHECK-NEXT: br i1 [[CMP1]], label [[BB_THEN:%.*]], label [[BB_ELSE:%.*]]
; CHECK: bb_then:
; CHECK-NEXT: call void @bar()
; CHECK-NEXT: br label [[BB_EXIT:%.*]]
; CHECK: bb_else:
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[ARG]], 17
; CHECK-NEXT: br label [[BB_EXIT]]
; CHECK: bb_exit:
; CHECK-NEXT: [[PHI1:%.*]] = phi i1 [ [[CMP2]], [[BB_ELSE]] ], [ undef, [[BB_THEN]] ]
; CHECK-NEXT: [[XOR1:%.*]] = xor i1 [[CMP1]], true
; CHECK-NEXT: [[AND1:%.*]] = select i1 [[PHI1]], i1 [[XOR1]], i1 false
; CHECK-NEXT: ret i1 [[AND1]]
;
entry:
%cmp1 = icmp eq i32 %arg, 37
br i1 %cmp1, label %bb_then, label %bb_else
bb_then:
call void @bar()
br label %bb_exit
bb_else:
%cmp2 = icmp slt i32 %arg, 17
br label %bb_exit
bb_exit:
%phi1 = phi i1 [ %cmp2, %bb_else ], [ undef, %bb_then ]
%xor1 = xor i1 %cmp1, true
%and1 = select i1 %phi1, i1 %xor1, i1 false
ret i1 %and1
}
declare void @bar()