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llvm-mirror/test/MC/Mips/mips32r2
Daniel Sanders 44cd6384d5 [mips] Added support for various EVA ASE instructions.
Summary:
Added support for the following instructions:

CACHEE, LBE, LBUE, LHE, LHUE, LWE, LLE, LWLE, LWRE, PREFE,
SBE, SHE, SWE, SCE, SWLE, SWRE, TLBINV, TLBINVF

This required adding some infrastructure for the EVA ASE.

Patch by Scott Egerton.

Reviewers: vkalintiris, dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11139

llvm-svn: 247669
2015-09-15 10:02:16 +00:00
..
abiflags.s Re-commit: [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reginfo, .MIPS.options, and .MIPS.abiflags 2014-07-14 15:05:51 +00:00
invalid-mips64r2.s [mips] Fold FeatureSwap into FeatureMips32r2 and FeatureMips64r2 2014-05-12 12:15:41 +00:00
invalid.s [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier). 2014-06-11 15:05:56 +00:00
valid-xfail.s [mips] Add synci instruction. 2014-11-27 17:28:10 +00:00
valid.s [mips] Added support for various EVA ASE instructions. 2015-09-15 10:02:16 +00:00