Matt Arsenault d374291e12 AMDGPU: Fix handling of div_scale with undef inputs ... The src0 register must match src1 or src2, but if these were undefined they could end up using different implicit_defed virtual registers. Force these to use one undef vreg or pick the defined other register. Also fixes producing invalid nodes without the right number of inputs when src2 is undef. llvm-svn: 309743		2017-08-01 20:49:41 +00:00
..
AArch64	Revert "[DAG] Extend visitSCALAR_TO_VECTOR optimization to truncated vector."	2017-08-01 18:09:25 +00:00
AMDGPU	AMDGPU: Fix handling of div_scale with undef inputs	2017-08-01 20:49:41 +00:00
ARM	[ScheduleDAG] Don't schedule node with physical register interference	2017-08-01 00:28:40 +00:00
AVR	[AVR] Remove the instrumentation pass	2017-07-23 23:39:11 +00:00
BPF	[DAG] Fix typo preventing some stores merges to truncated stores.	2017-07-23 02:06:28 +00:00
Generic	[TargetPassConfig] Feature generic options to setup start/stop-after/before	2017-07-31 18:24:07 +00:00
Hexagon	[Hexagon] Convert HVX vector constants of i1 to i8	2017-08-01 13:12:53 +00:00
Inputs
Lanai
Mips	[Mips] Fix for BBIT octeon instruction	2017-08-01 13:42:45 +00:00
MIR	AMDGPU: Implement memory model	2017-07-21 21:19:23 +00:00
MSP430	[DAG] Improve Aliasing of operations to static alloca	2017-07-18 20:06:24 +00:00
Nios2
NVPTX	[NVPTX] Add lowering of i128 params.	2017-07-20 21:16:03 +00:00
PowerPC	[CGP] use subtract or subtract-of-cmps for result of memcmp expansion	2017-07-31 18:08:24 +00:00
SPARC	[SPARC] Clean up the support for disabling fsmuld and fmuls instructions.	2017-07-20 20:09:11 +00:00
SystemZ	[SystemZ] test update	2017-07-21 13:14:17 +00:00
Thumb
Thumb2
WebAssembly	Revert r308273 to reinstate part of r308100.	2017-07-19 04:15:30 +00:00
WinEH
X86	[X86][SSE3] Add scheduler tests for MONITOR/MWAIT	2017-08-01 18:16:44 +00:00
XCore	[DAG] Improve Aliasing of operations to static alloca	2017-07-18 20:06:24 +00:00