mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 19:23:23 +01:00
c168815f4b
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
21 lines
786 B
LLVM
21 lines
786 B
LLVM
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -mattr=+soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands < %s | FileCheck %s -check-prefix=cond-b-short
|
|
|
|
@i = global i32 0, align 4
|
|
@j = common global i32 0, align 4
|
|
|
|
; Function Attrs: nounwind optsize
|
|
define i32 @main() #0 {
|
|
entry:
|
|
%0 = load i32, i32* @i, align 4
|
|
%cmp = icmp eq i32 %0, 0
|
|
%. = select i1 %cmp, i32 10, i32 55
|
|
store i32 %., i32* @j, align 4
|
|
; cond-b-short: beqz ${{[0-9]+}}, $BB{{[0-9]+}}_{{[0-9]+}} # 16 bit inst
|
|
ret i32 0
|
|
}
|
|
|
|
attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
|
|
|
|
|
|
|