..
2004-11-29-ShrCrash.ll
2004-11-30-shift-crash.ll
2004-11-30-shr-var-crash.ll
2004-12-12-ZeroSizeCommon.ll
2005-01-14-SetSelectCrash.ll
2005-01-14-UndefLong.ll
2005-08-12-rlwimi-crash.ll
2005-09-02-LegalizeDuplicatesCalls.ll
2005-10-08-ArithmeticRotate.ll
2005-11-30-vastart-crash.ll
2006-01-11-darwin-fp-argument.ll
2006-01-20-ShiftPartsCrash.ll
2006-04-01-FloatDoubleExtend.ll
2006-04-05-splat-ish.ll
2006-04-19-vmaddfp-crash.ll
2006-05-12-rlwimi-crash.ll
2006-07-07-ComputeMaskedBits.ll
Do full codegen for various tests. NFC
2017-02-27 01:15:57 +00:00
2006-07-19-stwbrx-crash.ll
2006-08-11-RetVector.ll
2006-08-15-SelectionCrash.ll
2006-09-28-shift_64.ll
2006-10-13-Miscompile.ll
2006-10-17-brcc-miscompile.ll
2006-10-17-ppc64-alloca.ll
2006-11-10-DAGCombineMiscompile.ll
2006-11-29-AltivecFPSplat.ll
2006-12-07-LargeAlloca.ll
2006-12-07-SelectCrash.ll
2007-01-04-ArgExtension.ll
2007-01-15-AsmDialect.ll
2007-01-29-lbrx-asm.ll
2007-01-31-InlineAsmAddrMode.ll
2007-02-16-AlignPacked.ll
2007-02-16-InlineAsmNConstraint.ll
2007-02-23-lr-saved-twice.ll
2007-03-24-cntlzd.ll
2007-03-30-SpillerCrash.ll
2007-04-24-InlineAsm-I-Modifier.ll
2007-04-30-InlineAsmEarlyClobber.ll
2007-05-03-InlineAsm-S-Constraint.ll
2007-05-14-InlineAsmSelectCrash.ll
2007-05-22-tailmerge-3.ll
2007-05-30-dagcombine-miscomp.ll
2007-06-28-BCCISelBug.ll
2007-08-04-CoalescerAssert.ll
2007-09-04-AltivecDST.ll
2007-09-07-LoadStoreIdxForms.ll
2007-09-08-unaligned.ll
2007-09-11-RegCoalescerAssert.ll
2007-09-12-LiveIntervalsAssert.ll
2007-10-16-InlineAsmFrameOffset.ll
2007-10-18-PtrArithmetic.ll
2007-10-21-LocalRegAllocAssert2.ll
2007-10-21-LocalRegAllocAssert.ll
2007-11-04-CoalescerCrash.ll
2007-11-16-landingpad-split.ll
Turn on -addr-sink-using-gep by default.
2017-04-06 22:42:18 +00:00
2007-11-19-VectorSplitting.ll
2008-02-05-LiveIntervalsAssert.ll
2008-02-09-LocalRegAllocAssert.ll
2008-03-05-RegScavengerAssert.ll
2008-03-17-RegScavengerCrash.ll
2008-03-18-RegScavengerAssert.ll
2008-03-24-AddressRegImm.ll
2008-03-24-CoalescerBug.ll
2008-03-26-CoalescerBug.ll
2008-04-10-LiveIntervalCrash.ll
2008-04-16-CoalescerBug.ll
2008-04-23-CoalescerCrash.ll
2008-05-01-ppc_fp128.ll
2008-06-19-LegalizerCrash.ll
2008-06-21-F128LoadStore.ll
2008-06-23-LiveVariablesCrash.ll
2008-07-10-SplatMiscompile.ll
2008-07-15-Bswap.ll
2008-07-15-Fabs.ll
2008-07-15-SignExtendInreg.ll
2008-07-17-Fneg.ll
2008-07-24-PPC64-CCBug.ll
2008-09-12-CoalescerBug.ll
2008-10-17-AsmMatchingOperands.ll
2008-10-28-f128-i32.ll
2008-10-28-UnprocessedNode.ll
2008-10-31-PPCF128Libcalls.ll
2008-12-02-LegalizeTypeAssert.ll
2009-01-16-DeclareISelBug.ll
2009-03-17-LSRBug.ll
2009-05-28-LegalizeBRCC.ll
2009-07-16-InlineAsm-M-Operand.ll
2009-08-17-inline-asm-addr-mode-breakage.ll
2009-09-18-carrybit.ll
2009-11-15-ProcImpDefsBug.ll
2009-11-25-ImpDefBug.ll
2010-02-04-EmptyGlobal.ll
2010-02-12-saveCR.ll
RegisterScavenging: Followup to r305625
2017-06-20 18:43:14 +00:00
2010-03-09-indirect-call.ll
2010-04-01-MachineCSEBug.ll
2010-05-03-retaddr1.ll
2010-10-11-Fast-Varargs.ll
2010-12-18-PPCStackRefs.ll
2011-12-05-NoSpillDupCR.ll
2011-12-06-SpillAndRestoreCR.ll
2011-12-08-DemandedBitsMiscompile.ll
2012-09-16-TOC-entry-check.ll
2012-10-11-dynalloc.ll
2012-10-12-bitcast.ll
2012-11-16-mischedcall.ll
2013-05-15-preinc-fold.ll
2013-07-01-PHIElimBug.ll
2016-01-07-BranchWeightCrash.ll
2016-04-16-ADD8TLS.ll
2016-04-17-combine.ll
2016-04-28-setjmp.ll
a2-fp-basic.ll
a2q-stackalign.ll
a2q.ll
aa-tbaa.ll
aantidep-def-ec.mir
CalleeSavedRegister was removed from MIR and is recalculated upon MIR parsing.
2017-03-19 11:18:09 +00:00
aantidep-inline-asm-use.ll
add-fi.ll
addc.ll
addegluecrash.ll
addi-licm.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
addi-offset-fold.ll
addi-reassoc.ll
addisdtprelha-nonr3.mir
addrfuncstr.ll
aggressive-anti-dep-breaker-subreg.ll
alias.ll
align.ll
allocate-r0.ll
altivec-ord.ll
and_add.ll
and_sext.ll
and_sra.ll
and-branch.ll
and-elim.ll
and-imm.ll
andc.ll
[DAG] add splat vector support for 'xor' in SimplifyDemandedBits
2017-04-19 21:23:09 +00:00
anon_aggr.ll
[PowerPC] fix incorrect processor name for -mcpu in a test case
2017-06-27 08:35:35 +00:00
anyext_srl.ll
arr-fp-arg-no-copy.ll
ashr-neg1.ll
asm-constraints.ll
asm-dialect.ll
asm-printer-topological-order.ll
asm-Zy.ll
asym-regclass-copy.ll
atomic-1.ll
atomic-2.ll
[PowerPC] fix potential verification errors on CFENCE8
2017-06-15 16:51:28 +00:00
atomic-minmax.ll
Atomics-64.ll
atomics-constant.ll
[PowerPC] fix potential verification errors on CFENCE8
2017-06-15 16:51:28 +00:00
atomics-fences.ll
atomics-indexed.ll
[PPC] Lower load acquire/seq_cst trailing fence to cmp + bne + isync.
2017-05-16 20:18:06 +00:00
atomics-regression.ll
Enhance synchscope representation
2017-07-11 22:23:00 +00:00
atomics.ll
[PPC] Lower load acquire/seq_cst trailing fence to cmp + bne + isync.
2017-05-16 20:18:06 +00:00
available-externally.ll
bdzlr.ll
big-endian-actual-args.ll
big-endian-call-result.ll
big-endian-formal-args.ll
bitcasts-direct-move.ll
[PowerPC][Altivec] Add mfvrd and mffprd extended mnemonic
2017-03-15 16:04:53 +00:00
blockaddress.ll
BoolRetToIntTest-2.ll
[PPC] In PPCBoolRetToInt change the bool value to i64 if the target is ppc64
2017-06-08 18:27:24 +00:00
BoolRetToIntTest.ll
[PPC] In PPCBoolRetToInt change the bool value to i64 if the target is ppc64
2017-06-08 18:27:24 +00:00
bperm.ll
branch_coalesce.ll
Improve scheduling with branch coalescing
2017-03-01 20:29:34 +00:00
branch-hint.ll
branch-opt.ll
BreakableToken-reduced.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
bswap-load-store.ll
build-vector-tests.ll
[PowerPC] Reduce register pressure by not materializing a constant just for use as an index register for X-Form loads/stores.
2017-07-10 16:44:45 +00:00
buildvec_canonicalize.ll
builtins-ppc-elf2-abi.ll
builtins-ppc-p8vector.ll
bv-pres-v8i1.ll
bv-widen-undef.ll
byval-agg-info.ll
byval-aliased.ll
calls.ll
can-lower-ret.ll
cannonicalize-vector-shifts.ll
cc.ll
change-no-infs.ll
cmp-cmp.ll
cmpb-ppc32.ll
cmpb.ll
coal-sections.ll
coalesce-ext.ll
code-align.ll
combine-to-pre-index-store-crash.ll
compare-duplicate.ll
compare-simm.ll
complex-return.ll
Update constants in complex-return test to prevent reduction to smaller constants
2017-06-24 01:29:24 +00:00
constants-i64.ll
constants.ll
copysignl.ll
cr1eq-no-extra-moves.ll
cr1eq.ll
cr_spilling.ll
cr-spills.ll
crash.ll
crbit-asm-disabled.ll
crbit-asm.ll
crbits.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-06-07 12:23:41 +00:00
crsave.ll
crypto_bifs.ll
ctr-cleanup.ll
ctr-loop-tls-const.ll
ctr-minmaxnum.ll
ctrloop-asm.ll
ctrloop-cpsgn.ll
ctrloop-fp64.ll
ctrloop-i64.ll
ctrloop-i128.ll
[PowerPC] multiply-with-overflow might use the CTR register
2017-04-11 02:03:17 +00:00
ctrloop-intrin.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
ctrloop-large-ec.ll
ctrloop-le.ll
ctrloop-lt.ll
ctrloop-ne.ll
ctrloop-reg.ll
ctrloop-s000.ll
ctrloop-sh.ll
ctrloop-sums.ll
ctrloop-udivti3.ll
ctrloops-softfloat.ll
ctrloops.ll
cttz.ll
cxx_tlscc64.ll
darwin-labels.ll
dbg.ll
DbgValueOtherTargets.test
dcbt-sched.ll
delete-node.ll
direct-move-profit.ll
div-2.ll
div-e-32.ll
div-e-all.ll
dyn-alloca-aligned.ll
RegScavenging: Add scavengeRegisterBackwards()
2017-06-17 02:08:18 +00:00
dyn-alloca-offset.ll
e500-1.ll
early-ret2.ll
early-ret.ll
ec-input.ll
eh-dwarf-cfa.ll
empty-functions.ll
Don't emit CFI instructions at the end of a function
2017-04-24 18:45:59 +00:00
emptystruct.ll
emutls_generic.ll
eqv-andc-orc-nor.ll
expand-contiguous-isel.ll
expand-isel-1.mir
expand-isel-2.mir
expand-isel-3.mir
expand-isel-4.mir
expand-isel-5.mir
expand-isel-6.mir
expand-isel-7.mir
expand-isel-8.mir
expand-isel.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-05-31 08:04:07 +00:00
ext-bool-trunc-repl.ll
extra-toc-reg-deps.ll
extsh.ll
f32-to-i64.ll
fabs.ll
fast-isel-binary.ll
fast-isel-br-const.ll
fast-isel-call.ll
fast-isel-cmp-imm.ll
fast-isel-const.ll
fast-isel-conversion-p5.ll
fast-isel-conversion.ll
fast-isel-crash.ll
fast-isel-ext.ll
fast-isel-fcmp-nan.ll
fast-isel-fold.ll
fast-isel-fpconv.ll
fast-isel-GEP-coalesce.ll
fast-isel-i64offset.ll
fast-isel-icmp-split.ll
fast-isel-indirectbr.ll
fast-isel-load-store-vsx.ll
fast-isel-load-store.ll
fast-isel-redefinition.ll
fast-isel-ret.ll
fast-isel-shifter.ll
fastisel-gep-promote-before-add.ll
fcpsgn.ll
fdiv-combine.ll
float-asmprint.ll
float-to-int.ll
floatPSA.ll
[PowerPC] set optimization level in SelectionDAGISel
2017-06-27 04:52:17 +00:00
flt-preinc.ll
fma-aggr-FMF.ll
[DAGCombiner] Initial support for the fast-math flag contract
2017-03-30 18:53:04 +00:00
fma-assoc.ll
fma-ext.ll
fma-mutate-duplicate-vreg.ll
fma-mutate-register-constraint.ll
fma-mutate.ll
fma.ll
fmaxnum.ll
fminnum.ll
fnabs.ll
fneg.ll
fold-li.ll
fold-zero.ll
fp2int2fp-ppcfp128.ll
fp64-to-int16.ll
fp128-bitcast-after-operation.ll
[PowerPC][Altivec] Add mfvrd and mffprd extended mnemonic
2017-03-15 16:04:53 +00:00
fp_to_uint.ll
fp-branch.ll
fp-int-conversions-direct-moves.ll
[PowerPC][Altivec] Add mfvrd and mffprd extended mnemonic
2017-03-15 16:04:53 +00:00
fp-int-fp.ll
fp-to-int-ext.ll
fp-to-int-to-fp.ll
fpcopy.ll
frame-size.ll
frameaddr.ll
Frames-alloca.ll
Frames-large.ll
Frames-leaf.ll
Frames-small.ll
frounds.ll
fsel.ll
fsl-e500mc.ll
fsl-e5500.ll
fsqrt.ll
func-addr-consts.ll
func-addr.ll
glob-comp-aa-crash.ll
hello-reloc.s
hello.ll
hidden-vis-2.ll
hidden-vis.ll
htm.ll
i1-ext-fold.ll
i1-to-double.ll
i32-to-float.ll
i64_fp_round.ll
[PowerPC] Use rldicr instruction for AND with an immediate if possible
2017-02-24 18:03:16 +00:00
i64_fp.ll
i64-to-float.ll
i128-and-beyond.ll
ia-mem-r0.ll
ia-neg-const.ll
iabs.ll
ifcvt-forked-bug-2016-08-08.ll
ifcvt.ll
illegal-element-type.ll
in-asm-f64-reg.ll
indexed-load.ll
indirect-hidden.ll
indirectbr.ll
[CGP] Split some critical edges coming out of indirect branches
2017-02-28 00:11:34 +00:00
inline-asm-s-modifier.ll
inline-asm-scalar-to-vector-error.ll
inlineasm-copy.ll
inlineasm-i64-reg.ll
int-fp-conv-0.ll
int-fp-conv-1.ll
inverted-bool-compares.ll
isel-rc-nox0.ll
isel.ll
ispositive.ll
itofp128.ll
jaggedstructs.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
LargeAbsoluteAddr.ll
lbz-from-ld-shift.ll
lbzux.ll
ld-st-upd.ll
ldtoc-inv.ll
lha.ll
licm-remat.ll
[PowerPC] define target hook isReallyTriviallyReMaterializable()
2017-06-21 17:17:56 +00:00
licm-tocReg.ll
[MachineLICM] Hoist TOC-based address instructions
2017-06-15 18:29:59 +00:00
lit.local.cfg
livephysregs.mir
LivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI
2017-05-26 16:23:08 +00:00
load-constant-addr.ll
load-shift-combine.ll
load-two-flts.ll
load-v4i8-improved.ll
logic-ops-on-compares.ll
Revert r304907 as it is causing some failures that I cannot reproduce.
2017-06-14 07:05:42 +00:00
long-compare.ll
longcall.ll
longdbl-truncate.ll
loop-data-prefetch-inner.ll
loop-data-prefetch.ll
loop-prep-all.ll
lsa.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
lsr-postinc-pos.ll
lxvw4x-bug.ll
machine-combiner.ll
mask64.ll
mature-mc-support.ll
mc-instrlat.ll
mcm-1.ll
mcm-2.ll
mcm-3.ll
mcm-4.ll
mcm-5.ll
mcm-6.ll
mcm-7.ll
mcm-8.ll
mcm-9.ll
mcm-10.ll
mcm-11.ll
mcm-12.ll
mcm-13.ll
mcm-default.ll
mcm-obj-2.ll
mcm-obj.ll
mcount-insertion.ll
mem_update.ll
mem-rr-addr-mode.ll
memcmp.ll
[PowerPC] auto-generate check lines; NFC
2017-06-30 19:20:54 +00:00
memcmpIR.ll
[CGP] add specialization for memcmp expansion with only one basic block
2017-06-27 23:15:01 +00:00
memCmpUsedInZeroEqualityComparison.ll
[CGP] eliminate a sub instruction in memcmp expansion
2017-06-27 21:46:34 +00:00
memcpy_dereferenceable.ll
[SelectionDAG] set dereferenceable flag when expanding memcpy/memmove
2017-06-24 15:17:38 +00:00
memcpy-vec.ll
memset-nc-le.ll
memset-nc.ll
merge_stores_dereferenceable.ll
[SelectionDAG] set dereferenceable flag in MergeConsecutiveStores to fix assetion failure
2017-06-27 12:43:08 +00:00
merge-st-chain-op.ll
MergeConsecutiveStores.ll
mftb.ll
misched-inorder-latency.ll
misched.ll
mtvsrdd.ll
[PPC] Change the register constraint of the first source operand of instruction mtvsrdd to g8rc_nox0
2017-05-11 22:17:35 +00:00
mul-neg-power-2.ll
mul-with-overflow.ll
mulhs.ll
mulli64.ll
mult-alt-generic-powerpc64.ll
mult-alt-generic-powerpc.ll
multi-return.ll
named-reg-alloc-r0.ll
named-reg-alloc-r1-64.ll
named-reg-alloc-r1.ll
named-reg-alloc-r2-64.ll
named-reg-alloc-r2.ll
named-reg-alloc-r13-64.ll
named-reg-alloc-r13.ll
neg.ll
negate-i1.ll
negctr.ll
no-dead-strip.ll
no-dup-spill-fp.ll
no-ext-with-count-zeros.ll
no-extra-fp-conv-ldst.ll
no-pref-jumps.ll
no-rlwimi-trivial-commute.mir
novrsave.ll
opt-cmp-inst-cr0-live.ll
Summary
2017-05-21 06:00:05 +00:00
opt-sub-inst-cr0-live.mir
optcmp.ll
optnone-crbits-i1-ret.ll
or-addressing-mode.ll
p8-isel-sched.ll
p8-scalar_vector_conversions.ll
[PowerPC][Altivec] Add mfvrd and mffprd extended mnemonic
2017-03-15 16:04:53 +00:00
p8altivec-shuffles-pred.ll
[PowerPC] Fix a performance bug for PPC::XXSLDWI.
2017-05-24 23:48:29 +00:00
p9-vector-compares-and-counts.ll
p9-xxinsertw-xxextractuw.ll
[PowerPC] Fix a performance bug for PPC::XXSLDWI.
2017-05-24 23:48:29 +00:00
peephole-align.ll
pie.ll
pip-inner.ll
popcnt.ll
post-ra-ec.ll
power9-moves-and-splats.ll
ppc32-align-long-double-sf.ll
ppc32-constant-BE-ppcf128.ll
ppc32-cyclecounter.ll
ppc32-i1-vaarg.ll
ppc32-lshrti3.ll
ppc32-nest.ll
ppc32-pic-large.ll
ppc32-pic.ll
ppc32-skip-regs.ll
ppc32-vacopy.ll
ppc64-32bit-addic.ll
ppc64-abi-extend.ll
ppc64-align-long-double.ll
[PowerPC] set optimization level in SelectionDAGISel
2017-06-27 04:52:17 +00:00
ppc64-altivec-abi.ll
ppc64-anyregcc-crash.ll
ppc64-anyregcc.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
ppc64-blnop.ll
ppc64-byval-align.ll
ppc64-calls.ll
ppc64-crash.ll
ppc64-cyclecounter.ll
ppc64-elf-abi.ll
ppc64-fastcc-fast-isel.ll
ppc64-fastcc.ll
ppc64-func-desc-hoist.ll
ppc64-gep-opt.ll
Turn on -addr-sink-using-gep by default.
2017-04-06 22:42:18 +00:00
ppc64-get-cache-line-size.ll
[PowerPC] Correctly specify the cache line size for Power 7, 8 and 9.
2017-05-31 18:20:17 +00:00
ppc64-i128-abi.ll
P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org/D33248
2017-05-24 17:50:37 +00:00
ppc64-icbt-pwr7.ll
ppc64-icbt-pwr8.ll
ppc64-linux-func-size.ll
ppc64-nest.ll
ppc64-nonfunc-calls.ll
ppc64-P9-mod.ll
[Power9] Added support for the modsw, moduw, modsd, modud hardware instructions.
2017-06-12 17:58:42 +00:00
ppc64-patchpoint.ll
ppc64-prefetch.ll
ppc64-r2-alloc.ll
ppc64-sibcall-shrinkwrap.ll
ppc64-sibcall.ll
ppc64-smallarg.ll
ppc64-stackmap-nops.ll
ppc64-stackmap.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
ppc64-toc.ll
ppc64-vaarg-int.ll
ppc64-zext.ll
ppc64le-aggregates.ll
[DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine
2017-03-01 18:12:29 +00:00
ppc64le-calls.ll
ppc64le-crsave.ll
ppc64le-localentry-large.ll
ppc64le-localentry.ll
ppc64le-smallarg.ll
[PowerPC] Reduce register pressure by not materializing a constant just for use as an index register for X-Form loads/stores.
2017-07-10 16:44:45 +00:00
ppc440-fp-basic.ll
ppc440-msync.ll
ppc-crbits-onoff.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-06-07 12:23:41 +00:00
ppc-ctr-dead-code.ll
[PowerPC] Make sure that we remove dead PHI nodes after the PPCCTRLoops pass.
2017-07-05 17:57:57 +00:00
ppc-empty-fs.ll
ppc-prologue.ll
ppc-redzone-alignment-bug.ll
[PPC] Fix two bugs in frame lowering.
2017-07-11 16:42:20 +00:00
ppc-shrink-wrapping.ll
ppc-vaarg-agg.ll
ppcf128-1-opt.ll
ppcf128-1.ll
ppcf128-2.ll
ppcf128-3.ll
ppcf128-4.ll
ppcf128-endian.ll
ppcf128sf.ll
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
ppcsoftops.ll
pr3711_widen_bit.ll
pr12757.ll
pr13641.ll
pr13891.ll
pr15031.ll
pr15359.ll
pr15630.ll
pr15632.ll
pr16556-2.ll
pr16556.ll
pr16573.ll
pr17168.ll
pr17354.ll
pr18663-2.ll
pr18663.ll
pr20442.ll
pr22711.ll
pr24216.ll
pr24546.ll
pr24636.ll
pr25157-peephole.ll
P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org/D33248
2017-05-24 17:50:37 +00:00
pr25157.ll
pr26180.ll
pr26193.ll
pr26356.ll
pr26378.ll
pr26381.ll
pr26617.ll
pr26690.ll
pr27078.ll
[PowerPC] Fix a performance bug for PPC::XXSLDWI.
2017-05-24 23:48:29 +00:00
pr27350.ll
pr28130.ll
pr28630.ll
pr30451.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
pr30640.ll
pr30663.ll
pr30715.ll
pr31144.ll
pr32063.ll
[PPC] Fix code generation for bswap(int32) followed by store16
2017-03-02 21:07:59 +00:00
pr32140.ll
[PowerPC] Fix failure with STBRX when store is narrower than the bswap
2017-03-06 07:32:13 +00:00
pr33093.ll
[PPC CodeGen] Expand the bitreverse.i64 intrinsic.
2017-07-10 18:11:23 +00:00
PR33636.ll
Add the missing triple to the test case added as part of r307120.
2017-07-05 05:14:43 +00:00
preinc-ld-sel-crash.ll
preincprep-invoke.ll
preincprep-nontrans-crash.ll
private.ll
pwr3-6x.ll
pwr7-gt-nop.ll
pzero-fp-xored.ll
qpx-bv-sint.ll
qpx-bv.ll
qpx-func-clobber.ll
qpx-load-splat.ll
qpx-load.ll
qpx-recipest.ll
qpx-rounding-ops.ll
qpx-s-load.ll
qpx-s-sel.ll
qpx-s-store.ll
qpx-sel.ll
qpx-split-vsetcc.ll
qpx-store.ll
qpx-unal-cons-lds.ll
qpx-unalperm.ll
quadint-return.ll
r31.ll
recipest.ll
reg-coalesce-simple.ll
reg-names.ll
reloc-align.ll
remap-crash.ll
remat-imm.ll
remove-redundant-moves.ll
resolvefi-basereg.ll
resolvefi-disp.ll
restore-r30.ll
[PPC] When restoring R30 (PIC base pointer), mark it as <def>
2017-05-04 19:14:54 +00:00
retaddr2.ll
retaddr.ll
return-val-i128.ll
rlwimi2.ll
rlwimi3.ll
rlwimi-and-or-bits.ll
rlwimi-and.ll
rlwimi-commute.ll
rlwimi-dyn-and.ll
rlwimi-keep-rsh.ll
rlwimi.ll
rlwinm2.ll
rlwinm-zero-ext.ll
rlwinm.ll
rm-zext.ll
rotl-2.ll
rotl-64.ll
rotl-rotr-crash.ll
rotl.ll
rounding-ops.ll
rs-undef-use.ll
s000-alias-misched.ll
save-bp.ll
[PPC] Properly update register save area offsets
2017-05-17 13:25:09 +00:00
save-cr-ppc32svr4.ll
[PPC] Properly update register save area offsets
2017-05-17 13:25:09 +00:00
save-crbp-ppc32svr4.ll
[PPC] Properly update register save area offsets
2017-05-17 13:25:09 +00:00
scavenging.mir
RegScavenging: Add scavengeRegisterBackwards()
2017-06-17 02:08:18 +00:00
sdag-ppcf128.ll
sdiv-pow2.ll
sections.ll
select_const.ll
[DAGCombiner] allow transforming (select Cond, C +/- 1, C) to (add(ext Cond), C)
2017-03-04 19:18:09 +00:00
select_lt0.ll
select-addrRegRegOnly.ll
[PowerPC] Reduce register pressure by not materializing a constant just for use as an index register for X-Form loads/stores.
2017-07-10 16:44:45 +00:00
select-cc.ll
select-i1-vs-i1.ll
selectiondag-extload-computeknownbits.ll
set0-v8i16.ll
setcc_no_zext.ll
setcc-logic.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-06-07 12:23:41 +00:00
setcc-to-sub.ll
Do full codegen for various tests. NFC
2017-02-27 01:15:57 +00:00
setcclike-or-comb.ll
seteq-0.ll
shift128.ll
CodeGen: Power: Add lowering for shifts of v1i128.
2017-05-17 21:54:41 +00:00
shift_mask.ll
[PowerPC, DAGCombiner] Fold a << (b % (sizeof(a) * 8)) back to a single instruction
2017-05-03 00:07:02 +00:00
shift-cmp.ll
shl_elim.ll
shl_sext.ll
sign_ext_inreg1.ll
sj-ctr-loop.ll
sjlj_no0x.ll
sjlj.ll
small-arguments.ll
spill-nor0.ll
splat-bug.ll
split-index-tc.ll
srl-mask.ll
[PowerPC] Use rldicr instruction for AND with an immediate if possible
2017-02-24 18:03:16 +00:00
stack-no-redzone.ll
stack-protector.ll
stack-realign.ll
stackmap-frame-setup.ll
Add extra operand to CALLSEQ_START to keep frame part set up previously
2017-05-09 13:35:13 +00:00
stacksize.ll
Revert "Revert "[PowerPC][ELFv2ABI] Allocate parameter area on-demand to reduce stack frame size""
2017-03-08 02:41:35 +00:00
std-unal-fi.ll
stdux-constuse.ll
stfiwx-2.ll
stfiwx.ll
store-load-fwd.ll
store-update.ll
structsinmem.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
structsinregs.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
stubs.ll
stwu8.ll
stwu-gta.ll
stwux.ll
sub-bv-types.ll
subc.ll
subreg-postra-2.ll
subreg-postra.ll
subtract_from_imm.ll
[PowerPC] Use subfic instruction for subtract from immediate
2017-02-24 18:16:06 +00:00
svr4-redzone.ll
[PPC] Fix two bugs in frame lowering.
2017-07-11 16:42:20 +00:00
swaps-le-1.ll
[PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LE
2017-05-02 01:47:34 +00:00
swaps-le-2.ll
[PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LE
2017-05-02 01:47:34 +00:00
swaps-le-3.ll
swaps-le-4.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
swaps-le-5.ll
swaps-le-6.ll
P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org/D33248
2017-05-24 17:50:37 +00:00
swaps-le-7.ll
tail-dup-analyzable-fallthrough.ll
tail-dup-branch-to-fallthrough.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
tail-dup-break-cfg.ll
tail-dup-layout.ll
CodeGen: BlockPlacement: Increase tail duplication size for O3.
2017-05-15 17:30:47 +00:00
tailcall1-64.ll
[PPC] Fix one test case regression for patch https://reviews.llvm.org/D34337 .
2017-07-11 19:07:10 +00:00
tailcall1.ll
tailcall-string-rvo.ll
tailcallpic1.ll
testBitReverse.ll
[PPC CodeGen] Expand the bitreverse.i64 intrinsic.
2017-07-10 18:11:23 +00:00
testComparesieqsc.ll
[PowerPC] Eliminate integer compare instructions - vol. 1
2017-05-11 16:54:23 +00:00
testComparesieqsi.ll
[PowerPC] Eliminate integer compare instructions - vol. 1
2017-05-11 16:54:23 +00:00
testComparesieqsll.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-05-31 08:04:07 +00:00
testComparesieqss.ll
[PowerPC] Eliminate integer compare instructions - vol. 1
2017-05-11 16:54:23 +00:00
testComparesiequc.ll
[PowerPC] Eliminate integer compare instructions - vol. 1
2017-05-11 16:54:23 +00:00
testComparesiequi.ll
[PowerPC] Eliminate integer compare instructions - vol. 1
2017-05-11 16:54:23 +00:00
testComparesiequll.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-05-31 08:04:07 +00:00
testComparesiequs.ll
[PowerPC] Eliminate integer compare instructions - vol. 1
2017-05-11 16:54:23 +00:00
testComparesinesc.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-06-07 12:23:41 +00:00
testComparesinesi.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-06-07 12:23:41 +00:00
testComparesiness.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-06-07 12:23:41 +00:00
testComparesineuc.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-06-07 12:23:41 +00:00
testComparesineui.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-06-07 12:23:41 +00:00
testComparesineus.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-06-07 12:23:41 +00:00
testCompareslleqsc.ll
[PowerPC] Eliminate integer compare instructions - vol. 1
2017-05-11 16:54:23 +00:00
testCompareslleqsi.ll
[PowerPC] Eliminate integer compare instructions - vol. 1
2017-05-11 16:54:23 +00:00
testCompareslleqsll.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-05-31 08:04:07 +00:00
testCompareslleqss.ll
[PowerPC] Eliminate integer compare instructions - vol. 1
2017-05-11 16:54:23 +00:00
testComparesllequc.ll
[PowerPC] Eliminate integer compare instructions - vol. 1
2017-05-11 16:54:23 +00:00
testComparesllequi.ll
[PowerPC] Eliminate integer compare instructions - vol. 1
2017-05-11 16:54:23 +00:00
testComparesllequll.ll
[PowerPC] Eliminate integer compare instructions - vol. 3
2017-05-31 08:04:07 +00:00
testComparesllequs.ll
[PowerPC] Eliminate integer compare instructions - vol. 1
2017-05-11 16:54:23 +00:00
thread-pointer.ll
tls_get_addr_clobbers.ll
tls_get_addr_fence1.mir
[PowerPC] fix potential verification error on __tls_get_addr
2017-06-29 14:13:38 +00:00
tls_get_addr_fence2.mir
[PowerPC] fix potential verification error on __tls_get_addr
2017-06-29 14:13:38 +00:00
tls_get_addr_stackframe.ll
tls-cse.ll
tls-pic.ll
tls-store2.ll
tls.ll
[PowerPC] set optimization level in SelectionDAGISel
2017-06-27 04:52:17 +00:00
toc-load-sched-bug.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
trampoline.ll
unal4-std.ll
unal-altivec2.ll
unal-altivec-wint.ll
unal-altivec.ll
unal-vec-ldst.ll
unal-vec-negarith.ll
unaligned.ll
unsafe-math.ll
unwind-dw2-g.ll
unwind-dw2.ll
vaddsplat.ll
varargs-struct-float.ll
varargs.ll
variable_elem_vec_extracts.ll
vcmp-fold.ll
vec_abs.ll
vec_absd.ll
vec_add_sub_doubleword.ll
vec_add_sub_quadword.ll
vec_auto_constant.ll
vec_br_cmp.ll
vec_buildvector_loadstore.ll
vec_call.ll
vec_clz.ll
vec_cmp.ll
vec_cmpd.ll
vec_constants.ll
vec_conv.ll
vec_extload.ll
vec_extract_p9.ll
[Power9] Exploit vector extract with variable index.
2017-07-05 16:55:00 +00:00
vec_fmuladd.ll
vec_fneg.ll
vec_insert.ll
vec_int_ext.ll
[Power9] Exploit vector integer extend instructions when indices aren't correct.
2017-07-05 16:00:38 +00:00
vec_mergeow.ll
vec_minmax.ll
vec_misaligned.ll
vec_mul_even_odd.ll
vec_mul.ll
vec_perf_shuffle.ll
vec_popcnt.ll
vec_revb.ll
[PowerPC] Match vec_revb builtins to P9 instructions.
2017-06-12 18:24:36 +00:00
vec_rotate_shift.ll
vec_rounding.ll
vec_select.ll
vec_shift.ll
vec_shuffle_le.ll
vec_shuffle_p8vector_le.ll
vec_shuffle_p8vector.ll
vec_shuffle.ll
vec_sldwi.ll
[PowerPC] Fix a performance bug for PPC::XXSLDWI.
2017-05-24 23:48:29 +00:00
vec_splat_constant.ll
vec_splat.ll
vec_sqrt.ll
vec_urem_const.ll
vec_veqv_vnand_vorc.ll
vec_vrsave.ll
vec_xxpermdi.ll
[PowerPC] Fix a performance bug for PPC::XXPERMDI.
2017-05-31 13:09:57 +00:00
vec_zero.ll
vec-abi-align.ll
vec-asm-disabled.ll
vector-identity-shuffle.ll
vector-merge-store-fp-constants.ll
vector.ll
vperm-instcombine.ll
vperm-lowering.ll
vrsave-spill.ll
vrspill.ll
vsel-prom.ll
vsx_insert_extract_le.ll
P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org/D33248
2017-05-24 17:50:37 +00:00
vsx_scalar_ld_st.ll
vsx_shuffle_le.ll
P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org/D33248
2017-05-24 17:50:37 +00:00
vsx-args.ll
VSX-DForm-Scalars.ll
vsx-div.ll
vsx-elementary-arith.ll
vsx-fma-m.ll
vsx-fma-mutate-trivial-copy.ll
vsx-fma-mutate-undef.ll
vsx-fma-sp.ll
vsx-infl-copy1.ll
vsx-infl-copy2.ll
vsx-ldst-builtin-le.ll
P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org/D33248
2017-05-24 17:50:37 +00:00
vsx-ldst.ll
P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org/D33248
2017-05-24 17:50:37 +00:00
vsx-minmax.ll
vsx-p8.ll
vsx-p9.ll
P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org/D33248
2017-05-24 17:50:37 +00:00
vsx-partword-int-loads-and-stores.ll
[PowerPC] Reduce register pressure by not materializing a constant just for use as an index register for X-Form loads/stores.
2017-07-10 16:44:45 +00:00
vsx-recip-est.ll
vsx-self-copy.ll
vsx-spill-norwstore.ll
vsx-spill.ll
RegisterScavenging: Followup to r305625
2017-06-20 18:43:14 +00:00
vsx-vec-spill.ll
vsx-word-splats.ll
vsx.ll
RegisterScavenging: Followup to r305625
2017-06-20 18:43:14 +00:00
vtable-reloc.ll
weak_def_can_be_hidden.ll
xvcmpeqdp-v2f64.ll
xxleqv_xxlnand_xxlorc.ll
zero-not-run.ll
zext-free.ll
