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27ebd85dfa
The existing check lines were more flexible, but these are small enough tests that there shouldn't be much question about register allocation. I've been hand-modifying this file as I change the CGP memcmp expansion, but that's more error-prone and time-consuming than just running the update script. llvm-svn: 306861
73 lines
2.3 KiB
LLVM
73 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux < %s | FileCheck %s -check-prefix=CHECK
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define signext i32 @memcmp8(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
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; CHECK-LABEL: memcmp8:
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; CHECK: # BB#0:
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; CHECK-NEXT: ldbrx 3, 0, 3
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; CHECK-NEXT: ldbrx 4, 0, 4
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; CHECK-NEXT: li 5, 1
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; CHECK-NEXT: li 12, -1
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; CHECK-NEXT: cmpld 3, 4
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; CHECK-NEXT: isel 3, 12, 5, 0
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; CHECK-NEXT: isel 3, 0, 3, 2
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; CHECK-NEXT: blr
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%t0 = bitcast i32* %buffer1 to i8*
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%t1 = bitcast i32* %buffer2 to i8*
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%call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 8)
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ret i32 %call
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}
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define signext i32 @memcmp4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
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; CHECK-LABEL: memcmp4:
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; CHECK: # BB#0:
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; CHECK-NEXT: lwbrx 3, 0, 3
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; CHECK-NEXT: lwbrx 4, 0, 4
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; CHECK-NEXT: li 5, 1
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; CHECK-NEXT: li 12, -1
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; CHECK-NEXT: cmplw 3, 4
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; CHECK-NEXT: isel 3, 12, 5, 0
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; CHECK-NEXT: isel 3, 0, 3, 2
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; CHECK-NEXT: blr
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%t0 = bitcast i32* %buffer1 to i8*
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%t1 = bitcast i32* %buffer2 to i8*
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%call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 4)
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ret i32 %call
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}
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define signext i32 @memcmp2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
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; CHECK-LABEL: memcmp2:
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; CHECK: # BB#0:
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; CHECK-NEXT: lhbrx 3, 0, 3
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; CHECK-NEXT: lhbrx 4, 0, 4
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; CHECK-NEXT: li 5, 1
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; CHECK-NEXT: li 12, -1
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; CHECK-NEXT: cmplw 3, 4
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; CHECK-NEXT: isel 3, 12, 5, 0
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; CHECK-NEXT: isel 3, 0, 3, 2
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; CHECK-NEXT: blr
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%t0 = bitcast i32* %buffer1 to i8*
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%t1 = bitcast i32* %buffer2 to i8*
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%call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 2)
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ret i32 %call
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}
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define signext i32 @memcmp1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
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; CHECK-LABEL: memcmp1:
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; CHECK: # BB#0:
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; CHECK-NEXT: lbz 3, 0(3)
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; CHECK-NEXT: lbz 4, 0(4)
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; CHECK-NEXT: li 5, 1
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; CHECK-NEXT: li 12, -1
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; CHECK-NEXT: cmplw 3, 4
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; CHECK-NEXT: isel 3, 12, 5, 0
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; CHECK-NEXT: isel 3, 0, 3, 2
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; CHECK-NEXT: blr
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%t0 = bitcast i32* %buffer1 to i8*
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%t1 = bitcast i32* %buffer2 to i8*
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%call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 1) #2
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ret i32 %call
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}
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declare signext i32 @memcmp(i8*, i8*, i64)
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