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69391ac868
PowerPC backend does not pass the current optimization level to SelectionDAGISel and so SelectionDAGISel works with the default optimization level regardless of the current optimization level. This patch makes the PowerPC backend set the optimization level correctly. Differential Revision: https://reviews.llvm.org/D34615 llvm-svn: 306367
47 lines
1.6 KiB
LLVM
47 lines
1.6 KiB
LLVM
; RUN: llc -relocation-model=static -verify-machineinstrs -O0 < %s -march=ppc64 -mcpu=ppc64 | FileCheck -check-prefix=OPT0 %s
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; RUN: llc -relocation-model=static -verify-machineinstrs -O1 < %s -march=ppc64 -mcpu=ppc64 | FileCheck -check-prefix=OPT1 %s
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; RUN: llc -verify-machineinstrs -O0 < %s -march=ppc32 -mcpu=ppc | FileCheck -check-prefix=OPT0-PPC32 %s
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target triple = "powerpc64-unknown-linux-gnu"
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@a = thread_local global i32 0, align 4
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;OPT0-LABEL: localexec:
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;OPT1-LABEL: localexec:
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define i32 @localexec() nounwind {
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entry:
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;OPT0: addis [[REG1:[0-9]+]], 13, a@tprel@ha
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;OPT0-NEXT: addi [[REG1]], [[REG1]], a@tprel@l
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;OPT0-NEXT: li [[REG2:[0-9]+]], 42
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;OPT0: stw [[REG2]], 0([[REG1]])
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;OPT1: addis [[REG1:[0-9]+]], 13, a@tprel@ha
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;OPT1-NEXT: li [[REG2:[0-9]+]], 42
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;OPT1-NEXT: stw [[REG2]], a@tprel@l([[REG1]])
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store i32 42, i32* @a, align 4
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ret i32 0
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}
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; Test correct assembly code generation for thread-local storage
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; using the initial-exec model.
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@a2 = external thread_local global i32
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define signext i32 @main2() nounwind {
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entry:
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%retval = alloca i32, align 4
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store i32 0, i32* %retval
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%0 = load i32, i32* @a2, align 4
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ret i32 %0
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}
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; OPT1-LABEL: main2:
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; OPT1: addis [[REG1:[0-9]+]], 2, a2@got@tprel@ha
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; OPT1: ld [[REG2:[0-9]+]], a2@got@tprel@l([[REG1]])
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; OPT1: add {{[0-9]+}}, [[REG2]], a2@tls
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;OPT0-PPC32-LABEL: main2:
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;OPT0-PPC32: li [[REG1:[0-9]+]], _GLOBAL_OFFSET_TABLE_@l
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;OPT0-PPC32: addis [[REG1]], [[REG1]], _GLOBAL_OFFSET_TABLE_@ha
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;OPT0-PPC32: lwz [[REG2:[0-9]+]], a2@got@tprel@l([[REG1]])
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;OPT0-PPC32: add 3, [[REG2]], a2@tls
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