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536c57b8db
Power9 has instructions that will reverse the bytes within an element for all sizes (half-word, word, double-word and quad-word). These can be used for the vec_revb builtins in altivec.h. However, we implement these to match vector shuffle nodes as that will cover both the builtins and vector shuffles that occur in the SDAG through other means. Differential Revision: https://reviews.llvm.org/D33690 llvm-svn: 305214
55 lines
2.0 KiB
LLVM
55 lines
2.0 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck %s
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define <8 x i16> @testXXBRH(<8 x i16> %a) {
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; CHECK-LABEL: testXXBRH:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: xxbrh 34, 34
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; CHECK-NEXT: blr
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entry:
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%0 = bitcast <8 x i16> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
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%2 = bitcast <16 x i8> %1 to <8 x i16>
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ret <8 x i16> %2
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}
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define <4 x i32> @testXXBRW(<4 x i32> %a) {
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; CHECK-LABEL: testXXBRW:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: xxbrw 34, 34
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; CHECK-NEXT: blr
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entry:
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%0 = bitcast <4 x i32> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>
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%2 = bitcast <16 x i8> %1 to <4 x i32>
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ret <4 x i32> %2
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}
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define <2 x double> @testXXBRD(<2 x double> %a) {
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; CHECK-LABEL: testXXBRD:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: xxbrd 34, 34
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; CHECK-NEXT: blr
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entry:
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%0 = bitcast <2 x double> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8>
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%2 = bitcast <16 x i8> %1 to <2 x double>
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ret <2 x double> %2
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}
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define <1 x i128> @testXXBRQ(<1 x i128> %a) {
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; CHECK-LABEL: testXXBRQ:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: xxbrq 34, 34
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; CHECK-NEXT: blr
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entry:
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%0 = bitcast <1 x i128> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
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%2 = bitcast <16 x i8> %1 to <1 x i128>
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ret <1 x i128> %2
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}
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