Nikolai Bozhenov 33987986e4 [NFC] Use stdin for some tests instead of positional argument. ... Summary: Otherwise unexpected matches with the path to the tests might happen. Reviewers: rengolin, spatel, efriedma, RKSimon Reviewed By: spatel Subscribers: n.bozhenov, javed.absar, llvm-commits Patch by Andrei Elovikov <andrei.elovikov@intel.com> Differential Revision: https://reviews.llvm.org/D32994 llvm-svn: 306684		2017-06-29 14:51:54 +00:00
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2007-01-31-RegInfoAssert.ll
2007-02-02-JoinIntervalsCrash.ll
2007-05-05-InvalidPushPop.ll
2009-06-18-ThumbCommuteMul.ll
2009-07-20-TwoAddrBug.ll
2009-07-27-PEIAssert.ll
2009-08-12-ConstIslandAssert.ll
2009-08-12-RegInfoAssert.ll
2009-08-20-ISelBug.ll
2009-12-17-pre-regalloc-taildup.ll
2010-06-18-SibCallCrash.ll
2010-07-01-FuncAlign.ll
2010-07-15-debugOrdering.ll	In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.	2017-03-14 00:34:14 +00:00
2011-05-11-DAGLegalizer.ll
2011-06-16-NoGPRs.ll
2011-EpilogueBug.ll
2012-04-26-M0ISelBug.ll
2014-06-10-thumb1-ldst-opt-bug.ll
and_neg.ll
asmprinter-bug.ll
barrier.ll
bic_imm.ll
callee_save.ll
cmp-add-fold.ll
cmp-fold.ll
constants.ll
copy_thumb.ll
cortex-m0-unaligned-access.ll
DbgValueOtherTargets.test
dyn-stackalloc.ll
fastcc.ll
fpconv.ll
fpow.ll
frame_thumb.ll
iabs.ll
inlineasm-imm-thumb.ll
inlineasm-thumb.ll
ispositive.ll	[ARM] t2_so_imm_neg had a subtle bug in the conversion, and could trigger UB by negating (int)-2147483648. By pure luck, none of the pre-existing tests triggered this; so I'm adding one.	2017-03-22 15:09:30 +00:00
large-stack.ll	RegScavenging: Add scavengeRegisterBackwards()	2017-06-17 02:08:18 +00:00
ldm-merge-call.ll
ldm-merge-struct.ll
ldm-stm-base-materialization-thumb2.ll
ldm-stm-base-materialization.ll
ldm-stm-postinc.ll
ldr_ext.ll
ldr_frame.ll
lit.local.cfg
long_shift.ll
long-setcc.ll	[NFC] Use stdin for some tests instead of positional argument.	2017-06-29 14:51:54 +00:00
long.ll	[Thumb1] The recently added tADCS and tSBCS pseudo-instructions were missing Uses = [CPSR]	2017-04-21 07:35:21 +00:00
machine-cse-physreg.mir	Move machine-cse-physreg.mir to test/CodeGen/Thumb	2017-05-24 17:20:47 +00:00
mature-mc-support.ll
mul.ll
optionaldef-scheduling.ll	[ARM] ScheduleDAGRRList::DelayForLiveRegsBottomUp must consider OptionalDefs	2017-04-23 06:58:08 +00:00
pop.ll
PR17309.ll	Add address space mangling to lifetime intrinsics	2017-04-10 20:18:21 +00:00
push.ll
remove-unneeded-push-pop.ll
rev.ll
segmented-stacks-dynamic.ll
segmented-stacks.ll
select.ll
sjljehprepare-lower-vector.ll
stack_guard_remat.ll	Add address space mangling to lifetime intrinsics	2017-04-10 20:18:21 +00:00
stack-access.ll	Elide stores which are overwritten without being observed.	2017-05-16 19:43:56 +00:00
stack-coloring-without-frame-ptr.ll	Add address space mangling to lifetime intrinsics	2017-04-10 20:18:21 +00:00
stack-frame.ll
stm-deprecated.ll
stm-merge.ll
tbb-reuse.mir
thumb-imm.ll
thumb-ldm.ll
thumb-shrink-wrapping.ll
trap.ll
triple.ll
tst_teq.ll
unord.ll
vargs.ll