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Summary: This is done by first adding two additional instructions to convert the alloca returned address to local and convert it back to generic. Then replace all uses of alloca instruction with the converted generic address. Then we can rely NVPTXFavorNonGenericAddrSpace pass to combine the generic addresscast and the corresponding Load, Store, Bitcast, GEP Instruction together. Patched by Xuetian Weng (xweng@google.com). Test Plan: test/CodeGen/NVPTX/lower-alloca.ll Reviewers: jholewinski, jingyue Reviewed By: jingyue Subscribers: meheff, broune, eliben, jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D10483 llvm-svn: 239964
23 lines
772 B
LLVM
23 lines
772 B
LLVM
; RUN: opt < %s -S -nvptx-lower-alloca -nvptx-favor-non-generic -dce | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix PTX
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
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target triple = "nvptx64-unknown-unknown"
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define void @kernel() {
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; LABEL: @lower_alloca
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; PTX-LABEL: .visible .entry kernel(
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%A = alloca i32
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; CHECK: addrspacecast i32* %A to i32 addrspace(5)*
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; CHECK: store i32 0, i32 addrspace(5)* {{%.+}}
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; PTX: st.local.u32 [{{%rd[0-9]+}}], {{%r[0-9]+}}
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store i32 0, i32* %A
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call void @callee(i32* %A)
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ret void
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}
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declare void @callee(i32*)
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!nvvm.annotations = !{!0}
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!0 = !{void ()* @kernel, !"kernel", i32 1}
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