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llvm-mirror/utils/TableGen
Elena Demikhovsky befed29343 Masked Load / Store Intrinsics - the CodeGen part.
I'm recommiting the codegen part of the patch.
The vectorizer part will be send to review again.

Masked Vector Load and Store Intrinsics.
Introduced new target-independent intrinsics in order to support masked vector loads and stores. The loop vectorizer optimizes loops containing conditional memory accesses by generating these intrinsics for existing targets AVX2 and AVX-512. The vectorizer asks the target about availability of masked vector loads and stores.
Added SDNodes for masked operations and lowering patterns for X86 code generator.
Examples:
<16 x i32> @llvm.masked.load.v16i32(i8* %addr, <16 x i32> %passthru, i32 4 /* align */, <16 x i1> %mask)
declare void @llvm.masked.store.v8f64(i8* %addr, <8 x double> %value, i32 4, <8 x i1> %mask)

Scalarizer for other targets (not AVX2/AVX-512) will be done in a separate patch.

http://reviews.llvm.org/D6191

llvm-svn: 223348
2014-12-04 09:40:44 +00:00
..
AsmMatcherEmitter.cpp Simplify ownership of RegClasses by using list<CodeGenRegisterClass> instead of vector<CodeGenRegisterClass*> 2014-12-03 19:58:45 +00:00
AsmWriterEmitter.cpp Remove indirection of vector<T*> in favor of deque<T> 2014-11-29 18:13:39 +00:00
AsmWriterInst.cpp Remove dead code. 2014-11-25 20:11:29 +00:00
AsmWriterInst.h Remove dead code. 2014-11-25 20:11:29 +00:00
CallingConvEmitter.cpp [tablegen] Add CustomCallingConv and use it to tablegen-erate the outermost parts of the Mips O32 implementation 2014-11-01 17:38:22 +00:00
CMakeLists.txt
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp Remove neverHasSideEffects support from TableGen CodeGenInstruction. Everyone should use hasSideEffects now. 2014-11-26 04:11:14 +00:00
CodeGenDAGPatterns.h Revert "Improve memory ownership/management in TableGen by unique_ptrifying TreePattern's Tree member." 2014-11-17 22:55:41 +00:00
CodeGenInstruction.cpp Remove neverHasSideEffects support from TableGen CodeGenInstruction. Everyone should use hasSideEffects now. 2014-11-26 04:11:14 +00:00
CodeGenInstruction.h Remove neverHasSideEffects support from TableGen CodeGenInstruction. Everyone should use hasSideEffects now. 2014-11-26 04:11:14 +00:00
CodeGenIntrinsics.h
CodeGenMapTable.cpp
CodeGenRegisters.cpp range-for some things 2014-12-03 19:58:49 +00:00
CodeGenRegisters.h Simplify CodeGenRegBank::inferMatchingSuperRegClass & its caller by passing an iterator rather than index 2014-12-03 19:58:48 +00:00
CodeGenSchedule.cpp Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> 2014-11-19 07:49:26 +00:00
CodeGenSchedule.h
CodeGenTarget.cpp Masked Load / Store Intrinsics - the CodeGen part. 2014-12-04 09:40:44 +00:00
CodeGenTarget.h Use unique_ptr to simplify deletion. 2014-11-28 20:30:37 +00:00
CTagsEmitter.cpp
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h Fix missing C++ mode comment 2014-11-02 23:46:44 +00:00
DAGISelMatcherEmitter.cpp Use unique_ptr to handle ownership of TreePatterns in CodeGenDAGPatterns::PatternFragments 2014-11-13 21:40:02 +00:00
DAGISelMatcherGen.cpp Simplify ownership of RegClasses by using list<CodeGenRegisterClass> instead of vector<CodeGenRegisterClass*> 2014-12-03 19:58:45 +00:00
DAGISelMatcherOpt.cpp Make StringSet::insert return pair<iterator, bool> like other self-associative containers 2014-11-19 02:56:00 +00:00
DFAPacketizerEmitter.cpp
DisassemblerEmitter.cpp
FastISelEmitter.cpp Change order of tablegen generated fast-isel instruction code to be 2014-11-14 21:05:45 +00:00
FixedLenDecoderEmitter.cpp Reduce code duplication a bit. 2014-09-27 05:26:42 +00:00
InstrInfoEmitter.cpp Tablegen output formatting fixes. 2014-11-23 09:40:10 +00:00
IntrinsicEmitter.cpp Masked Load / Store Intrinsics - the CodeGen part. 2014-12-04 09:40:44 +00:00
LLVMBuild.txt
Makefile
module.modulemap
OptParserEmitter.cpp
PseudoLoweringEmitter.cpp
RegisterInfoEmitter.cpp Simplify ownership of RegClasses by using list<CodeGenRegisterClass> instead of vector<CodeGenRegisterClass*> 2014-12-03 19:58:45 +00:00
SequenceToOffsetTable.h Reduce size of some tables in tablegen register info output. 2014-11-22 18:30:18 +00:00
SubtargetEmitter.cpp Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> 2014-11-19 07:49:26 +00:00
TableGen.cpp
TableGenBackends.h
tdtags
X86DisassemblerShared.h
X86DisassemblerTables.cpp [AVX512] Extended avx512_sqrt_packed (sqrt instructions) to VL subset. 2014-10-28 18:15:20 +00:00
X86DisassemblerTables.h
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp [AVX512] Support mask register in MRMDestReg format 2014-10-08 23:25:29 +00:00
X86RecognizableInstr.h