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d40d7b9594
llvm-mirror/test/CodeGen
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Daniel Sanders d40d7b9594 [mips] Correct 128-bit shifts on 64-bit targets. 
Summary:
The existing code was correct for 32-bit GPR's but not 64-bit GPR's. It now
accounts for both cases.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits, mohit.bhakkad, sagar

Differential Revision: http://reviews.llvm.org/D9337

llvm-svn: 236099
2015-04-29 12:28:58 +00:00
..
AArch64 [AArch64] Also combine vector selects fed by non-i1 SETCCs. 2015-04-27 21:43:12 +00:00
ARM ARM: fix peephole optimisation of TST 2015-04-28 22:03:55 +00:00
BPF [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
CPP [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
Generic Switch lowering: Take branch weight into account when ordering for fall-through 2015-04-27 23:35:22 +00:00
Hexagon [Hexagon] Use constant extenders to fix up hardware loops 2015-04-27 14:16:43 +00:00
Inputs DebugInfo: Fix bad debug info for compile units and types 2015-03-27 20:46:33 +00:00
Mips [mips] Correct 128-bit shifts on 64-bit targets. 2015-04-29 12:28:58 +00:00
MSP430 [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
NVPTX [NVPTX] Handle addrspacecast constant expressions in aggregate initializers 2015-04-28 17:18:30 +00:00
PowerPC [PPC64LE] Remove unnecessary swaps from lane-insensitive vector computations 2015-04-27 19:57:34 +00:00
R600 R600: Fix up for AsmPrinter's OutStreamer being a unique_ptr 2015-04-28 17:37:03 +00:00
SPARC [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
SystemZ Allow memory intrinsics to be tail calls 2015-04-13 17:16:45 +00:00
Thumb [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
Thumb2 Thumb2: When applying branch optimizations, visit branches in reverse order. 2015-04-23 20:31:35 +00:00
WinEH [WinEH] Split blocks at calls to llvm.eh.begincatch 2015-04-28 21:54:14 +00:00
X86 transform fadd chains to increase parallelism 2015-04-28 21:03:22 +00:00
XCore [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00