Simon Pilgrim d415434cde [X86] Tag RDRAND/RDSEED instruction scheduler classes ... llvm-svn: 320045		2017-12-07 14:18:48 +00:00
..
Analysis
Assembler
Bindings
Bitcode
BugPoint
CodeGen	[X86] Tag RDRAND/RDSEED instruction scheduler classes	2017-12-07 14:18:48 +00:00
DebugInfo	[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.	2017-12-07 10:40:31 +00:00
Examples
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
Linker
LTO
MC	[RISCV] MC layer support for the jump/branch instructions of the RVC extension	2017-12-07 13:19:57 +00:00
Object
ObjectYAML	Update obj2yaml and yaml2obj for .debug$H section.	2017-12-06 18:58:48 +00:00
Other
SafepointIRVerifier	[SafepointIRVerifier] Allow deriving pointers from unrelocated base	2017-12-05 21:39:37 +00:00
SymbolRewriter
TableGen	[TableGen] Give the option of tolerating duplicate register names	2017-12-07 09:51:55 +00:00
ThinLTO/X86
tools	[dsymutil] Add -verify option to run DWARF verifier after linking.	2017-12-07 11:17:19 +00:00
Transforms	[InstSimplify] Add tests for the rL319894	2017-12-07 08:52:24 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg.py
lit.site.cfg.py.in
TestRunner.sh