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The current implementation of ThumbRegisterInfo::saveScavengerRegister is bad for two reasons: one, it's buggy, and two, it blocks using R12 for other optimizations. So this patch gets rid of it, and adds the necessary support for using an ordinary emergency spill slot on Thumb1. (Specifically, I think saveScavengerRegister was broken by r305625, and nobody noticed for two years because the codepath is almost never used. The new code will also probably not be used much, but it now has better tests, and if we fail to emit a necessary emergency spill slot we get a reasonable error message instead of a miscompile.) A rough outline of the changes in the patch: 1. Gets rid of ThumbRegisterInfo::saveScavengerRegister. 2. Modifies ARMFrameLowering::determineCalleeSaves to allocate an emergency spill slot for Thumb1. 3. Implements useFPForScavengingIndex, so the emergency spill slot isn't placed at a negative offset from FP on Thumb1. 4. Modifies the heuristics for allocating an emergency spill slot to support Thumb1. This includes fixing ExtraCSSpill so we don't try to use "lr" as a substitute for allocating an emergency spill slot. 5. Allocates a base pointer in more cases, so the emergency spill slot is always accessible. 6. Modifies ARMFrameLowering::ResolveFrameIndexReference to compute the right offset in the new cases where we're forcing a base pointer. 7. Ensures we never generate a load or store with an offset outside of its frame object. This makes the heuristics more straightforward. 8. Changes Thumb1 prologue and epilogue emission so it never uses register scavenging. Some of the changes to the emergency spill slot heuristics in determineCalleeSaves affect ARM/Thumb2; hopefully, they should allow the compiler to avoid allocating an emergency spill slot in cases where it isn't necessary. The rest of the changes should only affect Thumb1. Differential Revision: https://reviews.llvm.org/D63677 llvm-svn: 364490
62 lines
2.4 KiB
C++
62 lines
2.4 KiB
C++
//===- ThumbRegisterInfo.h - Thumb Register Information Impl -*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Thumb implementation of the TargetRegisterInfo
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// class. With the exception of emitLoadConstPool Thumb2 tracks
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// ARMBaseRegisterInfo, Thumb1 overloads the functions below.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_ARM_THUMB1REGISTERINFO_H
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#define LLVM_LIB_TARGET_ARM_THUMB1REGISTERINFO_H
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#include "ARMBaseRegisterInfo.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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namespace llvm {
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class ARMSubtarget;
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class ARMBaseInstrInfo;
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struct ThumbRegisterInfo : public ARMBaseRegisterInfo {
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public:
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ThumbRegisterInfo();
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const TargetRegisterClass *
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getLargestLegalSuperClass(const TargetRegisterClass *RC,
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const MachineFunction &MF) const override;
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const TargetRegisterClass *
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getPointerRegClass(const MachineFunction &MF,
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unsigned Kind = 0) const override;
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/// emitLoadConstPool - Emits a load from constpool to materialize the
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/// specified immediate.
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void
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emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
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const DebugLoc &dl, unsigned DestReg, unsigned SubIdx,
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int Val, ARMCC::CondCodes Pred = ARMCC::AL,
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unsigned PredReg = 0,
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unsigned MIFlags = MachineInstr::NoFlags) const override;
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// rewrite MI to access 'Offset' bytes from the FP. Update Offset to be
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// however much remains to be handled. Return 'true' if no further
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// work is required.
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bool rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx,
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unsigned FrameReg, int &Offset,
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const ARMBaseInstrInfo &TII) const;
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void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
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int64_t Offset) const override;
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, unsigned FIOperandNum,
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RegScavenger *RS = nullptr) const override;
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bool useFPForScavengingIndex(const MachineFunction &MF) const override;
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};
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}
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#endif
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