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AArch64
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Add LiveRangeShrink pass to shrink live range within BB.
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2017-05-12 19:29:27 +00:00 |
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AMDGPU
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AMDGPU/SI: Don't promote to vector if the load/store is volatile.
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2017-05-12 20:31:12 +00:00 |
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ARM
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[ARM][GlobalISel] Legalize narrow scalar ops by widening
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2017-05-11 09:45:57 +00:00 |
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AVR
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[AVR] When lowering Select8/Select16, put newly generated MBBs in the same spot
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2017-05-13 00:22:34 +00:00 |
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BPF
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[bpf] fix a bug which causes incorrect big endian reloc fixup
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2017-05-05 18:05:00 +00:00 |
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Generic
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Add a late IR expansion pass for the experimental reduction intrinsics.
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2017-05-10 09:42:49 +00:00 |
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Hexagon
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Add extra operand to CALLSEQ_START to keep frame part set up previously
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2017-05-09 13:35:13 +00:00 |
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Inputs
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Lanai
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[lanai] Add computeKnownBitsForTargetNode for Lanai.
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2017-05-09 18:35:26 +00:00 |
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Mips
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Revert "[MIPS] Add support to match more patterns for DINS instruction"
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2017-05-09 13:18:48 +00:00 |
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MIR
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[IfConversion] Keep the CFG updated incrementally in IfConvertTriangle
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2017-05-12 06:28:58 +00:00 |
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MSP430
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[MSP430] Generate EABI-compliant libcalls
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2017-05-11 19:56:14 +00:00 |
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NVPTX
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[NVPTX] Don't flag StoreRetVal memory chain operands as ReadMem (PR32146)
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2017-05-12 19:56:43 +00:00 |
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PowerPC
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[PPC] Change the register constraint of the first source operand of instruction mtvsrdd to g8rc_nox0
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2017-05-11 22:17:35 +00:00 |
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SPARC
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Add LiveRangeShrink pass to shrink live range within BB.
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2017-05-12 19:29:27 +00:00 |
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SystemZ
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Handle a COPY with undef source operand in LowerCopy()
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2017-05-12 06:32:03 +00:00 |
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Thumb
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[ARM] ScheduleDAGRRList::DelayForLiveRegsBottomUp must consider OptionalDefs
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2017-04-23 06:58:08 +00:00 |
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Thumb2
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WebAssembly
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[WebAssembly] Fix WebAssemblyOptimizeReturned after r300367
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2017-04-17 21:40:28 +00:00 |
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WinEH
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X86
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[X86][AVX] Allow 32-bit targets to peek through subvectors to extract constant splats for vXi64 shifts.
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2017-05-14 11:46:26 +00:00 |
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XCore
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