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Acording to AMD documentation, the correct opcode for BFE_INT is 0x5, not 0x4 Fixes Arithm/Absdiff.Mat/3 OpenCV test Patch by: Bruno Jiménez llvm-svn: 205562
42 lines
1.6 KiB
LLVM
42 lines
1.6 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood -show-mc-encoding -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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declare i32 @llvm.AMDGPU.bfe.i32(i32, i32, i32) nounwind readnone
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; FUNC-LABEL: @bfe_i32_arg_arg_arg
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; SI: V_BFE_I32
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; EG: BFE_INT
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; EG: encoding: [{{[x0-9a-f]+,[x0-9a-f]+,[x0-9a-f]+,[x0-9a-f]+,[x0-9a-f]+}},0xac
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define void @bfe_i32_arg_arg_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) nounwind {
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%bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %src0, i32 %src1, i32 %src1) nounwind readnone
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @bfe_i32_arg_arg_imm
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; SI: V_BFE_I32
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; EG: BFE_INT
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define void @bfe_i32_arg_arg_imm(i32 addrspace(1)* %out, i32 %src0, i32 %src1) nounwind {
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%bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %src0, i32 %src1, i32 123) nounwind readnone
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @bfe_i32_arg_imm_arg
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; SI: V_BFE_I32
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; EG: BFE_INT
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define void @bfe_i32_arg_imm_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src2) nounwind {
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%bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %src0, i32 123, i32 %src2) nounwind readnone
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @bfe_i32_imm_arg_arg
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; SI: V_BFE_I32
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; EG: BFE_INT
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define void @bfe_i32_imm_arg_arg(i32 addrspace(1)* %out, i32 %src1, i32 %src2) nounwind {
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%bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 123, i32 %src1, i32 %src2) nounwind readnone
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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