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llvm-mirror/test/CodeGen
Bill Wendling d49e183a6f Make sure we add the predicate after all of the registers are added.
<rdar://problem/12183003>

llvm-svn: 162703
2012-08-27 22:12:44 +00:00
..
ARM Make sure we add the predicate after all of the registers are added. 2012-08-27 22:12:44 +00:00
CellSPU Add test triples to fix win32 failures. Revert workaround from r161292. 2012-08-08 20:31:37 +00:00
CPP
Generic BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle 2012-08-24 18:14:27 +00:00
Hexagon Infer instruction properties from single-instruction patterns. 2012-08-24 22:46:53 +00:00
MBlaze
Mips Disable Mips' delay slot filler when optimization level is O0. 2012-08-24 20:40:15 +00:00
MSP430 Reapply r161633-161634 "Partition use lists so defs always come before uses."" 2012-08-10 00:21:30 +00:00
NVPTX
PowerPC Lower constant pools and jump tables via TOC on PPC64/SVR4. 2012-08-24 16:26:02 +00:00
SPARC
Thumb
Thumb2 Add ADD and SUB to the predicable ARM instructions. 2012-08-16 23:21:55 +00:00
X86 llvm/test/CodeGen/X86/fma.ll: Add -march=x86, or two tests would fail on non-x86 hosts. 2012-08-27 11:50:26 +00:00
XCore