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llvm-mirror/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll
Peter Collingbourne 2930fae4b8 ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets.
This makes it more likely that we can use the 16-bit push and pop instructions
on Thumb-2, saving around 4 bytes per function.

Differential Revision: http://reviews.llvm.org/D9165

llvm-svn: 235637
2015-04-23 20:31:26 +00:00

33 lines
828 B
LLVM

; RUN: llc < %s -mtriple=thumbv7-none-linux-gnueabi -arm-atomic-cfg-tidy=0 | FileCheck %s
; PR4659
; PR4682
define hidden i32 @__gcov_execlp(i8* %path, i8* %arg, ...) nounwind {
entry:
; CHECK-LABEL: __gcov_execlp:
; CHECK: sub sp, #8
; CHECK: push
; CHECK: add r7, sp, #8
; CHECK: sub.w r4, r7, #8
; CHECK: mov sp, r4
; CHECK-NOT: mov sp, r7
; CHECK: add sp, #8
call void @__gcov_flush() nounwind
call void @llvm.va_start(i8* null)
br i1 undef, label %bb5, label %bb
bb: ; preds = %bb, %entry
br i1 undef, label %bb5, label %bb
bb5: ; preds = %bb, %entry
%0 = alloca i8*, i32 undef, align 4 ; <i8**> [#uses=1]
%1 = call i32 @execvp(i8* %path, i8** %0) nounwind ; <i32> [#uses=1]
ret i32 %1
}
declare hidden void @__gcov_flush()
declare i32 @execvp(i8*, i8**) nounwind
declare void @llvm.va_start(i8*) nounwind