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81a28f0089
This is a set of instructions that take just a single register as an operand, with no immediates. Because all instructions share the same format, I haven't added exhaustive bit testing to all instructions but just to the inc instruction. Differential Revision: https://reviews.llvm.org/D81968
21 lines
526 B
ArmAsm
21 lines
526 B
ArmAsm
; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
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; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
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foo:
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ror r31
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ror r25
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ror r5
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ror r0
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; CHECK: ror r31 ; encoding: [0xf7,0x95]
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; CHECK: ror r25 ; encoding: [0x97,0x95]
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; CHECK: ror r5 ; encoding: [0x57,0x94]
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; CHECK: ror r0 ; encoding: [0x07,0x94]
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; CHECK-INST: ror r31
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; CHECK-INST: ror r25
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; CHECK-INST: ror r5
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; CHECK-INST: ror r0
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