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https://github.com/RPCS3/llvm-mirror.git
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246602f2b6
The replacement doesn't work for llc, but it is needed by patchable-function-entry.ll. This reverts commit aa9a30b83a06e3e5e68e32ea645ec2d9edc27efc.
117 lines
3.4 KiB
ArmAsm
117 lines
3.4 KiB
ArmAsm
# RUN: llvm-mc -triple riscv32 -mattr=-relax -riscv-no-aliases < %s \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix=CHECK-RELOC %s
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# RUN: llvm-mc -triple riscv32 -filetype=obj < %s \
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# RUN: | llvm-objdump --triple=riscv32 --mattr=+c -d - \
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# RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-ALIAS %s
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# RUN: llvm-mc -triple riscv64 -mattr=-relax -riscv-no-aliases < %s \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix=CHECK-RELOC %s
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# RUN: llvm-mc -triple riscv64 -filetype=obj < %s \
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# RUN: | llvm-objdump --triple=riscv64 --mattr=+c -d - \
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# RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-ALIAS %s
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# Test the operation of the push and pop assembler directives when
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# using .option relax and .option rvc. Checks that using .option pop
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# correctly restores all target features to their state at the point
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# where .option pop was last used.
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# CHECK-INST: call foo
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# CHECK-RELOC: R_RISCV_CALL foo 0x0
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# CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
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call foo
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# CHECK-INST: addi s0, sp, 1020
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# CHECK-BYTES: 13 04 c1 3f
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# CHECK-ALIAS: addi s0, sp, 1020
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addi s0, sp, 1020
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.option push # Push relax=false, rvc=false
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# CHECK-INST: .option push
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.option relax
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# CHECK-INST: .option relax
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# CHECK-INST: call bar
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# CHECK-RELOC-NEXT: R_RISCV_CALL bar 0x0
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# CHECK-RELOC-NEXT: R_RISCV_RELAX - 0x0
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call bar
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.option push # Push relax=true, rvc=false
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# CHECK-INST: .option push
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.option rvc
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# CHECK-INST: .option rvc
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# CHECK-INST: c.addi4spn s0, sp, 1020
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# CHECK-BYTES: e0 1f
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# CHECK-ALIAS: addi s0, sp, 1020
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addi s0, sp, 1020
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.option pop # Pop relax=true, rvc=false
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# CHECK-INST: .option pop
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# CHECK-INST: addi s0, sp, 1020
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# CHECK-BYTES: 13 04 c1 3f
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# CHECK-ALIAS: addi s0, sp, 1020
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addi s0, sp, 1020
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# CHECK-INST: call bar
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# CHECK-RELOC-NEXT: R_RISCV_CALL bar 0x0
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# CHECK-RELOC-NEXT: R_RISCV_RELAX - 0x0
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call bar
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.option pop # Pop relax=false, rvc=false
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# CHECK-INST: .option pop
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# CHECK-INST: call baz
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# CHECK-RELOC: R_RISCV_CALL baz 0x0
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# CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
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call baz
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# CHECK-INST: addi s0, sp, 1020
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# CHECK-BYTES: 13 04 c1 3f
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# CHECK-ALIAS: addi s0, sp, 1020
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addi s0, sp, 1020
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.option push # Push pic=false
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# CHECK-INST: .option push
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.option pic
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# CHECK-INST: .option pic
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la s0, symbol
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# CHECK-INST: auipc s0, %got_pcrel_hi(symbol)
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# CHECK-INST: l{{[wd]}} s0, %pcrel_lo(.Lpcrel_hi0)(s0)
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# CHECK-RELOC: R_RISCV_GOT_HI20 symbol 0x0
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# CHECK-RELOC: R_RISCV_PCREL_LO12_I .Lpcrel_hi0 0x0
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.option push # Push pic=true
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# CHECK-INST: .option push
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.option nopic
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# CHECK-INST: .option nopic
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la s0, symbol
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# CHECK-INST: auipc s0, %pcrel_hi(symbol)
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# CHECK-INST: addi s0, s0, %pcrel_lo(.Lpcrel_hi1)
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# CHECK-RELOC: R_RISCV_PCREL_HI20 symbol 0x0
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# CHECK-RELOC: R_RISCV_PCREL_LO12_I .Lpcrel_hi1 0x0
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.option pop # Push pic=true
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# CHECK-INST: .option pop
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la s0, symbol
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# CHECK-INST: auipc s0, %got_pcrel_hi(symbol)
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# CHECK-INST: l{{[wd]}} s0, %pcrel_lo(.Lpcrel_hi2)(s0)
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# CHECK-RELOC: R_RISCV_GOT_HI20 symbol 0x0
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# CHECK-RELOC: R_RISCV_PCREL_LO12_I .Lpcrel_hi2 0x0
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.option pop # Push pic=false
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# CHECK-INST: .option pop
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la s0, symbol
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# CHECK-INST: auipc s0, %pcrel_hi(symbol)
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# CHECK-INST: addi s0, s0, %pcrel_lo(.Lpcrel_hi3)
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# CHECK-RELOC: R_RISCV_PCREL_HI20 symbol 0x0
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# CHECK-RELOC: R_RISCV_PCREL_LO12_I .Lpcrel_hi3 0x0
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