mirror of
https://github.com/RPCS3/llvm-mirror.git
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246602f2b6
The replacement doesn't work for llc, but it is needed by patchable-function-entry.ll. This reverts commit aa9a30b83a06e3e5e68e32ea645ec2d9edc27efc.
247 lines
5.9 KiB
ArmAsm
247 lines
5.9 KiB
ArmAsm
# RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
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# RUN: | llvm-objdump -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INST-ALIAS %s
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# These machine mode CSR register names are RV32 only, but RV64
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# can encode and disassemble these registers if given their value.
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######################################
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# Machine Protection and Translation
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######################################
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# pmpcfg1
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# uimm12
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# CHECK-INST: csrrs t2, 929, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x10,0x3a]
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# CHECK-INST-ALIAS: csrr t2, 929
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csrrs t2, 0x3A1, zero
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# pmpcfg3
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# uimm12
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# CHECK-INST: csrrs t2, 931, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x3a]
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# CHECK-INST-ALIAS: csrr t2, 931
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csrrs t2, 0x3A3, zero
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######################################
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# Machine Counter and Timers
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######################################
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# mcycleh
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# uimm12
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# CHECK-INST: csrrs t2, 2944, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2944
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csrrs t2, 0xB80, zero
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# minstreth
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# uimm12
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# CHECK-INST: csrrs t2, 2946, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x20,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2946
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csrrs t2, 0xB82, zero
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# mhpmcounter3h
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# uimm12
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# CHECK-INST: csrrs t2, 2947, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x30,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2947
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csrrs t2, 0xB83, zero
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# mhpmcounter4h
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# uimm12
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# CHECK-INST: csrrs t2, 2948, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x40,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2948
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csrrs t2, 0xB84, zero
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# mhpmcounter5h
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# uimm12
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# CHECK-INST: csrrs t2, 2949, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x50,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2949
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csrrs t2, 0xB85, zero
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# mhpmcounter6h
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# uimm12
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# CHECK-INST: csrrs t2, 2950, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x60,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2950
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csrrs t2, 0xB86, zero
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# mhpmcounter7h
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# uimm12
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# CHECK-INST: csrrs t2, 2951, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x70,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2951
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csrrs t2, 0xB87, zero
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# mhpmcounter8h
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# uimm12
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# CHECK-INST: csrrs t2, 2952, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x80,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2952
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csrrs t2, 0xB88, zero
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# mhpmcounter9h
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# uimm12
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# CHECK-INST: csrrs t2, 2953, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x90,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2953
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csrrs t2, 0xB89, zero
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# mhpmcounter10h
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# uimm12
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# CHECK-INST: csrrs t2, 2954, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xa0,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2954
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csrrs t2, 0xB8A, zero
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# mhpmcounter11h
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# uimm12
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# CHECK-INST: csrrs t2, 2955, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xb0,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2955
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csrrs t2, 0xB8B, zero
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# mhpmcounter12h
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# uimm12
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# CHECK-INST: csrrs t2, 2956, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xc0,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2956
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csrrs t2, 0xB8C, zero
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# mhpmcounter13h
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# uimm12
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# CHECK-INST: csrrs t2, 2957, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xd0,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2957
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csrrs t2, 0xB8D, zero
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# mhpmcounter14h
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# uimm12
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# CHECK-INST: csrrs t2, 2958, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xe0,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2958
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csrrs t2, 0xB8E, zero
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# mhpmcounter15h
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# uimm12
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# CHECK-INST: csrrs t2, 2959, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xf0,0xb8]
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# CHECK-INST-ALIAS: csrr t2, 2959
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csrrs t2, 0xB8F, zero
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# mhpmcounter16h
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# uimm12
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# CHECK-INST: csrrs t2, 2960, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2960
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csrrs t2, 0xB90, zero
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# mhpmcounter17h
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# uimm12
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# CHECK-INST: csrrs t2, 2961, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x10,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2961
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csrrs t2, 0xB91, zero
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# mhpmcounter18h
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# uimm12
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# CHECK-INST: csrrs t2, 2962, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x20,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2962
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csrrs t2, 0xB92, zero
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# mhpmcounter19h
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# uimm12
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# CHECK-INST: csrrs t2, 2963, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x30,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2963
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csrrs t2, 0xB93, zero
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# mhpmcounter20h
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# uimm12
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# CHECK-INST: csrrs t2, 2964, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x40,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2964
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csrrs t2, 0xB94, zero
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# mhpmcounter21h
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# uimm12
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# CHECK-INST: csrrs t2, 2965, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x50,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2965
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csrrs t2, 0xB95, zero
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# mhpmcounter22h
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# uimm12
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# CHECK-INST: csrrs t2, 2966, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x60,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2966
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csrrs t2, 0xB96, zero
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# mhpmcounter23h
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# uimm12
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# CHECK-INST: csrrs t2, 2967, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x70,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2967
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csrrs t2, 0xB97, zero
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# mhpmcounter24h
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# uimm12
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# CHECK-INST: csrrs t2, 2968, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x80,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2968
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csrrs t2, 0xB98, zero
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# mhpmcounter25h
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# uimm12
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# CHECK-INST: csrrs t2, 2969, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x90,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2969
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csrrs t2, 0xB99, zero
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# mhpmcounter26h
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# uimm12
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# CHECK-INST: csrrs t2, 2970, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xa0,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2970
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csrrs t2, 0xB9A, zero
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# mhpmcounter27h
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# uimm12
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# CHECK-INST: csrrs t2, 2971, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xb0,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2971
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csrrs t2, 0xB9B, zero
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# mhpmcounter28h
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# uimm12
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# CHECK-INST: csrrs t2, 2972, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xc0,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2972
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csrrs t2, 0xB9C, zero
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# mhpmcounter29h
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# uimm12
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# CHECK-INST: csrrs t2, 2973, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xd0,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2973
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csrrs t2, 0xB9D, zero
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# mhpmcounter30h
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# uimm12
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# CHECK-INST: csrrs t2, 2974, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xe0,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2974
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csrrs t2, 0xB9E, zero
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# mhpmcounter31h
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# uimm12
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# CHECK-INST: csrrs t2, 2975, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xf0,0xb9]
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# CHECK-INST-ALIAS: csrr t2, 2975
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csrrs t2, 0xB9F, zero
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