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llvm-mirror/test/MC/RISCV/rv64zbb-invalid.s
Craig Topper 8d1bb37e69 [RISCV] Move Shift Ones instructions from Zbb to Zbp to match 0.93 bitmanip spec.
It's not really clear in the spec that these are in Zbp now, but
that's what I've gather from previous commits to the spec. I've
file an issue to get it documented properly.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94652
2021-01-22 12:49:10 -08:00

9 lines
399 B
ArmAsm

# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zbb < %s 2>&1 | FileCheck %s
# Too many operands
clzw t0, t1, t2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
# Too many operands
ctzw t0, t1, t2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
# Too many operands
cpopw t0, t1, t2 # CHECK: :[[@LINE]]:15: error: invalid operand for instruction