mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-22 18:54:02 +01:00
246602f2b6
The replacement doesn't work for llc, but it is needed by patchable-function-entry.ll. This reverts commit aa9a30b83a06e3e5e68e32ea645ec2d9edc27efc.
588 lines
14 KiB
ArmAsm
588 lines
14 KiB
ArmAsm
# RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
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# RUN: | llvm-objdump -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INST-ALIAS %s
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#
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# RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
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# RUN: | llvm-objdump -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INST-ALIAS %s
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##################################
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# User Trap Setup
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##################################
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# ustatus
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# name
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# CHECK-INST: csrrs t1, ustatus, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x00,0x00]
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# CHECK-INST-ALIAS: csrr t1, ustatus
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# uimm12
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# CHECK-INST: csrrs t2, ustatus, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x00]
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# CHECK-INST-ALIAS: csrr t2, ustatus
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csrrs t1, ustatus, zero
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# uimm12
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csrrs t2, 0x000, zero
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# uie
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# name
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# CHECK-INST: csrrs t1, uie, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x40,0x00]
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# CHECK-INST-ALIAS: csrr t1, uie
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# uimm12
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# CHECK-INST: csrrs t2, uie, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x00]
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# CHECK-INST-ALIAS: csrr t2, uie
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# name
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csrrs t1, uie, zero
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# uimm12
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csrrs t2, 0x004, zero
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# utvec
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# name
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# CHECK-INST: csrrs t1, utvec, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x50,0x00]
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# CHECK-INST-ALIAS: csrr t1, utvec
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# uimm12
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# CHECK-INST: csrrs t2, utvec, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x50,0x00]
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# CHECK-INST-ALIAS: csrr t2, utvec
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# name
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csrrs t1, utvec, zero
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# uimm12
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csrrs t2, 0x005, zero
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##################################
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# User Trap Handling
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##################################
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# uscratch
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# name
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# CHECK-INST: csrrs t1, uscratch, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x00,0x04]
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# CHECK-INST-ALIAS: csrr t1, uscratch
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# uimm12
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# CHECK-INST: csrrs t2, uscratch, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x04]
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# CHECK-INST-ALIAS: csrr t2, uscratch
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# name
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csrrs t1, uscratch, zero
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# uimm12
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csrrs t2, 0x040, zero
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# uepc
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# name
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# CHECK-INST: csrrs t1, uepc, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x10,0x04]
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# CHECK-INST-ALIAS: csrr t1, uepc
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# uimm12
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# CHECK-INST: csrrs t2, uepc, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x10,0x04]
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# CHECK-INST-ALIAS: csrr t2, uepc
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# name
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csrrs t1, uepc, zero
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# uimm12
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csrrs t2, 0x041, zero
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# ucause
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# name
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# CHECK-INST: csrrs t1, ucause, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x20,0x04]
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# CHECK-INST-ALIAS: csrr t1, ucause
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# uimm12
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# CHECK-INST: csrrs t2, ucause, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x20,0x04]
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# CHECK-INST-ALIAS: csrr t2, ucause
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# name
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csrrs t1, ucause, zero
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# uimm12
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csrrs t2, 0x042, zero
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# utval
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# name
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# CHECK-INST: csrrs t1, utval, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x30,0x04]
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# CHECK-INST-ALIAS: csrr t1, utval
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# uimm12
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# CHECK-INST: csrrs t2, utval, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x04]
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# CHECK-INST-ALIAS: csrr t2, utval
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# name
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csrrs t1, utval, zero
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# uimm12
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csrrs t2, 0x043, zero
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# uip
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# name
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# CHECK-INST: csrrs t1, uip, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x40,0x04]
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# CHECK-INST-ALIAS: csrr t1, uip
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# uimm12
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# CHECK-INST: csrrs t2, uip, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x04]
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# CHECK-INST-ALIAS: csrr t2, uip
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#name
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csrrs t1, uip, zero
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# uimm12
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csrrs t2, 0x044, zero
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##################################
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# User Floating Pont CSRs
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##################################
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# Tests in rvf-user-mode-csr.s
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##################################
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# User Counter and Timers
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##################################
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# cycle
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# name
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# CHECK-INST: csrrs t1, cycle, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x00,0xc0]
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# CHECK-INST-ALIAS: rdcycle t1
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# uimm12
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# CHECK-INST: csrrs t2, cycle, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0xc0]
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# CHECK-INST-ALIAS: rdcycle t2
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# name
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csrrs t1, cycle, zero
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# uimm12
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csrrs t2, 0xC00, zero
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# time
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# name
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# CHECK-INST: csrrs t1, time, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x10,0xc0]
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# CHECK-INST-ALIAS: rdtime t1
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# uimm12
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# CHECK-INST: csrrs t2, time, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x10,0xc0]
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# CHECK-INST-ALIAS: rdtime t2
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# name
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csrrs t1, time, zero
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# uimm12
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csrrs t2, 0xC01, zero
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# instret
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# name
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# CHECK-INST: csrrs t1, instret, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x20,0xc0]
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# CHECK-INST-ALIAS: rdinstret t1
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# uimm12
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# CHECK-INST: csrrs t2, instret, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x20,0xc0]
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# CHECK-INST-ALIAS: rdinstret t2
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# name
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csrrs t1, instret, zero
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# uimm12
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csrrs t2, 0xC02, zero
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# hpmcounter3
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# name
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# CHECK-INST: csrrs t1, hpmcounter3, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x30,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter3
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter3, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x30,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter3
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# name
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csrrs t1, hpmcounter3, zero
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# uimm12
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csrrs t2, 0xC03, zero
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# hpmcounter4
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# name
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# CHECK-INST: csrrs t1, hpmcounter4, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x40,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter4
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter4, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x40,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter4
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# name
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csrrs t1, hpmcounter4, zero
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# uimm12
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csrrs t2, 0xC04, zero
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# hpmcounter5
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# name
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# CHECK-INST: csrrs t1, hpmcounter5, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x50,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter5
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter5, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x50,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter5
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# name
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csrrs t1, hpmcounter5, zero
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# uimm12
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csrrs t2, 0xC05, zero
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# hpmcounter6
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# name
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# CHECK-INST: csrrs t1, hpmcounter6, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x60,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter6
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter6, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x60,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter6
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# name
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csrrs t1, hpmcounter6, zero
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# uimm12
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csrrs t2, 0xC06, zero
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# hpmcounter7
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# name
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# CHECK-INST: csrrs t1, hpmcounter7, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x70,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter7
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter7, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x70,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter7
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# name
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csrrs t1, hpmcounter7, zero
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# uimm12
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csrrs t2, 0xC07, zero
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# hpmcounter8
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# name
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# CHECK-INST: csrrs t1, hpmcounter8, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x80,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter8
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter8, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x80,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter8
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# name
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csrrs t1, hpmcounter8, zero
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# uimm12
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csrrs t2, 0xC08, zero
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# hpmcounter9
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# name
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# CHECK-INST: csrrs t1, hpmcounter9, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x90,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter9
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter9, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x90,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter9
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# name
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csrrs t1, hpmcounter9, zero
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# uimm12
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csrrs t2, 0xC09, zero
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# hpmcounter10
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# name
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# CHECK-INST: csrrs t1, hpmcounter10, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xa0,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter10
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter10, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xa0,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter10
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# name
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csrrs t1, hpmcounter10, zero
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# uimm12
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csrrs t2, 0xC0A, zero
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# hpmcounter11
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# name
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# CHECK-INST: csrrs t1, hpmcounter11, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xb0,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter11
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter11, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xb0,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter11
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# name
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csrrs t1, hpmcounter11, zero
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# uimm12
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csrrs t2, 0xC0B, zero
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# hpmcounter12
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# name
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# CHECK-INST: csrrs t1, hpmcounter12, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xc0,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter12
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter12, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xc0,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter12
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# name
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csrrs t1, hpmcounter12, zero
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# uimm12
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csrrs t2, 0xC0C, zero
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# hpmcounter13
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# name
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# CHECK-INST: csrrs t1, hpmcounter13, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xd0,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter13
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter13, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xd0,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter13
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# name
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csrrs t1, hpmcounter13, zero
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# uimm12
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csrrs t2, 0xC0D, zero
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# hpmcounter14
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# name
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# CHECK-INST: csrrs t1, hpmcounter14, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xe0,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter14
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter14, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xe0,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter14
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# name
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csrrs t1, hpmcounter14, zero
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# uimm12
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csrrs t2, 0xC0E, zero
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# hpmcounter15
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# name
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# CHECK-INST: csrrs t1, hpmcounter15, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xf0,0xc0]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter15
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter15, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xf0,0xc0]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter15
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# name
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csrrs t1, hpmcounter15, zero
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# uimm12
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csrrs t2, 0xC0F, zero
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# hpmcounter16
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# name
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# CHECK-INST: csrrs t1, hpmcounter16, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x00,0xc1]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter16
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter16, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0xc1]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter16
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# name
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csrrs t1, hpmcounter16, zero
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# uimm12
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csrrs t2, 0xC10, zero
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# hpmcounter17
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# name
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# CHECK-INST: csrrs t1, hpmcounter17, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x10,0xc1]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter17
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter17, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x10,0xc1]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter17
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# name
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csrrs t1, hpmcounter17, zero
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# uimm12
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csrrs t2, 0xC11, zero
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# hpmcounter18
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# name
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# CHECK-INST: csrrs t1, hpmcounter18, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x20,0xc1]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter18
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter18, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x20,0xc1]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter18
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# name
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csrrs t1, hpmcounter18, zero
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# uimm12
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csrrs t2, 0xC12, zero
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# hpmcounter19
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# name
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# CHECK-INST: csrrs t1, hpmcounter19, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x30,0xc1]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter19
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter19, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x30,0xc1]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter19
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# name
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csrrs t1, hpmcounter19, zero
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# uimm12
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csrrs t2, 0xC13, zero
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# hpmcounter20
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# name
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# CHECK-INST: csrrs t1, hpmcounter20, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x40,0xc1]
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# CHECK-INST-ALIAS: csrr t1, hpmcounter20
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# uimm12
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# CHECK-INST: csrrs t2, hpmcounter20, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x40,0xc1]
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# CHECK-INST-ALIAS: csrr t2, hpmcounter20
|
|
# name
|
|
csrrs t1, hpmcounter20, zero
|
|
# uimm12
|
|
csrrs t2, 0xC14, zero
|
|
|
|
# hpmcounter21
|
|
# name
|
|
# CHECK-INST: csrrs t1, hpmcounter21, zero
|
|
# CHECK-ENC: encoding: [0x73,0x23,0x50,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t1, hpmcounter21
|
|
# uimm12
|
|
# CHECK-INST: csrrs t2, hpmcounter21, zero
|
|
# CHECK-ENC: encoding: [0xf3,0x23,0x50,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t2, hpmcounter21
|
|
# name
|
|
csrrs t1, hpmcounter21, zero
|
|
# uimm12
|
|
csrrs t2, 0xC15, zero
|
|
|
|
# hpmcounter22
|
|
# name
|
|
# CHECK-INST: csrrs t1, hpmcounter22, zero
|
|
# CHECK-ENC: encoding: [0x73,0x23,0x60,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t1, hpmcounter22
|
|
# uimm12
|
|
# CHECK-INST: csrrs t2, hpmcounter22, zero
|
|
# CHECK-ENC: encoding: [0xf3,0x23,0x60,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t2, hpmcounter22
|
|
# name
|
|
csrrs t1, hpmcounter22, zero
|
|
# uimm12
|
|
csrrs t2, 0xC16, zero
|
|
|
|
# hpmcounter23
|
|
# name
|
|
# CHECK-INST: csrrs t1, hpmcounter23, zero
|
|
# CHECK-ENC: encoding: [0x73,0x23,0x70,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t1, hpmcounter23
|
|
# uimm12
|
|
# CHECK-INST: csrrs t2, hpmcounter23, zero
|
|
# CHECK-ENC: encoding: [0xf3,0x23,0x70,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t2, hpmcounter23
|
|
# name
|
|
csrrs t1, hpmcounter23, zero
|
|
# uimm12
|
|
csrrs t2, 0xC17, zero
|
|
|
|
# hpmcounter24
|
|
# name
|
|
# CHECK-INST: csrrs t1, hpmcounter24, zero
|
|
# CHECK-ENC: encoding: [0x73,0x23,0x80,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t1, hpmcounter24
|
|
# uimm12
|
|
# CHECK-INST: csrrs t2, hpmcounter24, zero
|
|
# CHECK-ENC: encoding: [0xf3,0x23,0x80,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t2, hpmcounter24
|
|
# name
|
|
csrrs t1, hpmcounter24, zero
|
|
# uimm12
|
|
csrrs t2, 0xC18, zero
|
|
|
|
# hpmcounter25
|
|
# name
|
|
# CHECK-INST: csrrs t1, hpmcounter25, zero
|
|
# CHECK-ENC: encoding: [0x73,0x23,0x90,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t1, hpmcounter25
|
|
# uimm12
|
|
# CHECK-INST: csrrs t2, hpmcounter25, zero
|
|
# CHECK-ENC: encoding: [0xf3,0x23,0x90,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t2, hpmcounter25
|
|
# name
|
|
csrrs t1, hpmcounter25, zero
|
|
# uimm12
|
|
csrrs t2, 0xC19, zero
|
|
|
|
# hpmcounter26
|
|
# name
|
|
# CHECK-INST: csrrs t1, hpmcounter26, zero
|
|
# CHECK-ENC: encoding: [0x73,0x23,0xa0,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t1, hpmcounter26
|
|
# uimm12
|
|
# CHECK-INST: csrrs t2, hpmcounter26, zero
|
|
# CHECK-ENC: encoding: [0xf3,0x23,0xa0,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t2, hpmcounter26
|
|
# name
|
|
csrrs t1, hpmcounter26, zero
|
|
# uimm12
|
|
csrrs t2, 0xC1A, zero
|
|
|
|
# hpmcounter27
|
|
# name
|
|
# CHECK-INST: csrrs t1, hpmcounter27, zero
|
|
# CHECK-ENC: encoding: [0x73,0x23,0xb0,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t1, hpmcounter27
|
|
# uimm12
|
|
# CHECK-INST: csrrs t2, hpmcounter27, zero
|
|
# CHECK-ENC: encoding: [0xf3,0x23,0xb0,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t2, hpmcounter27
|
|
# name
|
|
csrrs t1, hpmcounter27, zero
|
|
# uimm12
|
|
csrrs t2, 0xC1B, zero
|
|
|
|
# hpmcounter28
|
|
# name
|
|
# CHECK-INST: csrrs t1, hpmcounter28, zero
|
|
# CHECK-ENC: encoding: [0x73,0x23,0xc0,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t1, hpmcounter28
|
|
# uimm12
|
|
# CHECK-INST: csrrs t2, hpmcounter28, zero
|
|
# CHECK-ENC: encoding: [0xf3,0x23,0xc0,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t2, hpmcounter28
|
|
# name
|
|
csrrs t1, hpmcounter28, zero
|
|
# uimm12
|
|
csrrs t2, 0xC1C, zero
|
|
|
|
# hpmcounter29
|
|
# name
|
|
# CHECK-INST: csrrs t1, hpmcounter29, zero
|
|
# CHECK-ENC: encoding: [0x73,0x23,0xd0,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t1, hpmcounter29
|
|
# uimm12
|
|
# CHECK-INST: csrrs t2, hpmcounter29, zero
|
|
# CHECK-ENC: encoding: [0xf3,0x23,0xd0,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t2, hpmcounter29
|
|
# name
|
|
csrrs t1, hpmcounter29, zero
|
|
# uimm12
|
|
csrrs t2, 0xC1D, zero
|
|
|
|
# hpmcounter30
|
|
# name
|
|
# CHECK-INST: csrrs t1, hpmcounter30, zero
|
|
# CHECK-ENC: encoding: [0x73,0x23,0xe0,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t1, hpmcounter30
|
|
# uimm12
|
|
# CHECK-INST: csrrs t2, hpmcounter30, zero
|
|
# CHECK-ENC: encoding: [0xf3,0x23,0xe0,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t2, hpmcounter30
|
|
# name
|
|
csrrs t1, hpmcounter30, zero
|
|
# uimm12
|
|
csrrs t2, 0xC1E, zero
|
|
|
|
# hpmcounter31
|
|
# name
|
|
# CHECK-INST: csrrs t1, hpmcounter31, zero
|
|
# CHECK-ENC: encoding: [0x73,0x23,0xf0,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t1, hpmcounter31
|
|
# uimm12
|
|
# CHECK-INST: csrrs t2, hpmcounter31, zero
|
|
# CHECK-ENC: encoding: [0xf3,0x23,0xf0,0xc1]
|
|
# CHECK-INST-ALIAS: csrr t2, hpmcounter31
|
|
# name
|
|
csrrs t1, hpmcounter31, zero
|
|
# uimm12
|
|
csrrs t2, 0xC1F, zero
|