mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-22 10:42:39 +01:00
ab043ff680
Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
56 lines
1.3 KiB
LLVM
56 lines
1.3 KiB
LLVM
; RUN: llc -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
|
|
|
|
@var = global i1 0
|
|
|
|
define i32 @test_sextloadi32() {
|
|
; CHECK-LABEL: test_sextloadi32
|
|
|
|
%val = load i1, i1* @var
|
|
%ret = sext i1 %val to i32
|
|
; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
|
|
; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1|sbfx w[0-9]+, w[0-9]+, #0, #1}}
|
|
|
|
ret i32 %ret
|
|
; CHECK: ret
|
|
}
|
|
|
|
define i64 @test_sextloadi64() {
|
|
; CHECK-LABEL: test_sextloadi64
|
|
|
|
%val = load i1, i1* @var
|
|
%ret = sext i1 %val to i64
|
|
; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
|
|
; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1}}
|
|
|
|
ret i64 %ret
|
|
; CHECK: ret
|
|
}
|
|
|
|
define i32 @test_zextloadi32() {
|
|
; CHECK-LABEL: test_zextloadi32
|
|
|
|
; It's not actually necessary that "ret" is next, but as far as LLVM
|
|
; is concerned only 0 or 1 should be loadable so no extension is
|
|
; necessary.
|
|
%val = load i1, i1* @var
|
|
%ret = zext i1 %val to i32
|
|
; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
|
|
|
|
ret i32 %ret
|
|
; CHECK-NEXT: ret
|
|
}
|
|
|
|
define i64 @test_zextloadi64() {
|
|
; CHECK-LABEL: test_zextloadi64
|
|
|
|
; It's not actually necessary that "ret" is next, but as far as LLVM
|
|
; is concerned only 0 or 1 should be loadable so no extension is
|
|
; necessary.
|
|
%val = load i1, i1* @var
|
|
%ret = zext i1 %val to i64
|
|
; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
|
|
|
|
ret i64 %ret
|
|
; CHECK-NEXT: ret
|
|
}
|