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104 lines
3.2 KiB
LLVM
104 lines
3.2 KiB
LLVM
; RUN: llc -O2 -march=hexagon -hexagon-expand-condsets=0 < %s
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; REQUIRES: asserts
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; Disable expand-condsets because it will assert on undefined registers.
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target triple = "hexagon-unknown--elf"
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%s.0 = type { %s.0*, %s.0* }
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%s.1 = type { %s.1*, %s.1** }
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@g0 = external global %s.0, align 4
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; Function Attrs: nounwind
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define void @f0() #0 {
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b0:
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br i1 undef, label %b2, label %b1
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b1: ; preds = %b0
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unreachable
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b2: ; preds = %b0
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br i1 undef, label %b26, label %b3
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b3: ; preds = %b2
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br i1 undef, label %b6, label %b4
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b4: ; preds = %b3
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br i1 undef, label %b5, label %b26
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b5: ; preds = %b4
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br i1 undef, label %b7, label %b26
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b6: ; preds = %b3
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br label %b7
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b7: ; preds = %b6, %b5
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br i1 undef, label %b11, label %b8
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b8: ; preds = %b7
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br i1 undef, label %b10, label %b9
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b9: ; preds = %b8
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unreachable
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b10: ; preds = %b8
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unreachable
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b11: ; preds = %b7
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br i1 undef, label %b25, label %b12
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b12: ; preds = %b11
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br i1 undef, label %b14, label %b13
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b13: ; preds = %b12
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br label %b14
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b14: ; preds = %b13, %b12
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br i1 undef, label %b15, label %b16
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b15: ; preds = %b14
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br label %b16
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b16: ; preds = %b15, %b14
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br i1 undef, label %b18, label %b17
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b17: ; preds = %b16
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unreachable
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b18: ; preds = %b16
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%v0 = load %s.0*, %s.0** getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 1), align 4
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%v1 = load %s.0*, %s.0** getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 0), align 4
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%v2 = select i1 undef, %s.0* %v0, %s.0* %v1
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br i1 undef, label %b22, label %b19
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b19: ; preds = %b18
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%v3 = load %s.1*, %s.1** undef, align 4
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%v4 = icmp eq %s.1* %v3, null
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br i1 %v4, label %b21, label %b20
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b20: ; preds = %b19
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store %s.1** undef, %s.1*** undef, align 4
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br label %b21
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b21: ; preds = %b20, %b19
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br label %b22
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b22: ; preds = %b21, %b18
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br i1 undef, label %b24, label %b23
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b23: ; preds = %b22
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store %s.0* %v2, %s.0** undef, align 4
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br label %b24
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b24: ; preds = %b23, %b22
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unreachable
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b25: ; preds = %b11
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unreachable
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b26: ; preds = %b5, %b4, %b2
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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