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65 lines
1.9 KiB
LLVM
65 lines
1.9 KiB
LLVM
; RUN: llc -march=hexagon -enable-aa-sched-mi -enable-pipeliner < %s
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; REQUIRES: asserts
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; Function Attrs: nounwind
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define void @f0() #0 {
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b0:
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br i1 undef, label %b1, label %b2
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b1: ; preds = %b0
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unreachable
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b2: ; preds = %b0
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br i1 undef, label %b3, label %b4
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b3: ; preds = %b2
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unreachable
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b4: ; preds = %b2
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br i1 undef, label %b5, label %b6
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b5: ; preds = %b4
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unreachable
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b6: ; preds = %b4
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br label %b7
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b7: ; preds = %b7, %b6
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br i1 undef, label %b8, label %b7
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b8: ; preds = %b7
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br i1 undef, label %b15, label %b9
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b9: ; preds = %b8
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br label %b10
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b10: ; preds = %b10, %b9
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br i1 undef, label %b11, label %b10
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b11: ; preds = %b10
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br label %b12
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b12: ; preds = %b12, %b11
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br i1 undef, label %b13, label %b12
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b13: ; preds = %b13, %b12
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%v0 = phi i32 [ %v5, %b13 ], [ 0, %b12 ]
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%v1 = getelementptr inbounds [11 x i32], [11 x i32]* undef, i32 0, i32 %v0
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%v2 = load i32, i32* %v1, align 4
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%v3 = add i32 %v2, 1
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%v4 = lshr i32 %v3, 1
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store i32 %v4, i32* %v1, align 4
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store i32 0, i32* %v1, align 4
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%v5 = add nsw i32 %v0, 1
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%v6 = icmp eq i32 %v5, 11
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br i1 %v6, label %b14, label %b13
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b14: ; preds = %b13
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br label %b15
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b15: ; preds = %b14, %b8
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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