mirror of
https://github.com/RPCS3/llvm-mirror.git
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a0de9e901c
llvm-svn: 328023
58 lines
1.8 KiB
LLVM
58 lines
1.8 KiB
LLVM
; RUN: llc -march=hexagon -enable-pipeliner -debug-only=pipeliner < %s -o - 2>&1 > /dev/null | FileCheck %s
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; REQUIRES: asserts
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; Fix bug when pipelining xxh benchmark at O3, mv55, and with vectorization.
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; The problem is choosing the correct name for the Phis in the epilog.
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; CHECK: New block
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; CHECK: %{{.*}}, %[[REG:([0-9]+)]]{{.*}} = L2_loadri_pi
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; CHECK: epilog:
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; CHECK: = PHI
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; CHECK-NOT: = PHI %{{[0-9]+}}, {{.*}}, %[[REG]]
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; CHECK: = PHI
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; Function Attrs: nounwind
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define void @f0(i32 %a0, i32* %a1) #0 {
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b0:
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%v0 = ashr i32 %a0, 1
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br label %b1
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b1: ; preds = %b1, %b0
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%v1 = phi i64 [ %v8, %b1 ], [ undef, %b0 ]
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%v2 = phi i32 [ %v9, %b1 ], [ 0, %b0 ]
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%v3 = phi i32 [ %v7, %b1 ], [ undef, %b0 ]
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%v4 = inttoptr i32 %v3 to i32*
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%v5 = load i32, i32* %v4, align 4, !tbaa !0
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%v6 = tail call i64 @llvm.hexagon.S2.packhl(i32 %v5, i32 undef)
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%v7 = add nsw i32 %v3, -16
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%v8 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %v1, i64 undef, i64 %v6)
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%v9 = add nsw i32 %v2, 1
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%v10 = icmp eq i32 %v9, %v0
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br i1 %v10, label %b2, label %b1
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b2: ; preds = %b1
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%v11 = trunc i64 %v8 to i32
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%v12 = getelementptr inbounds i32, i32* %a1, i32 8
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store i32 %v11, i32* %v12, align 4, !tbaa !0
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call void @llvm.trap()
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unreachable
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}
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; Function Attrs: nounwind readnone
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declare i64 @llvm.hexagon.M2.vdmacs.s0(i64, i64, i64) #1
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; Function Attrs: nounwind readnone
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declare i64 @llvm.hexagon.S2.packhl(i32, i32) #1
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; Function Attrs: noreturn nounwind
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declare void @llvm.trap() #2
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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attributes #1 = { nounwind readnone }
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attributes #2 = { noreturn nounwind }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C/C++ TBAA"}
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