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50 lines
1.4 KiB
LLVM
50 lines
1.4 KiB
LLVM
; RUN: llc -march=hexagon -O3 -verify-machineinstrs -disable-hexagon-peephole < %s
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; REQUIRES: asserts
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; This test checks if tied operands are consistent.
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target triple = "hexagon-unknown--elf"
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; Function Attrs: nounwind
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define void @f0(i16* nocapture %a0) #0 {
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b0:
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br label %b1
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b1: ; preds = %b5, %b0
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%v0 = phi i16* [ %a0, %b0 ], [ %v5, %b5 ]
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%v1 = phi i16 [ undef, %b0 ], [ %v10, %b5 ]
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br i1 undef, label %b2, label %b3
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b2: ; preds = %b1
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%v2 = getelementptr inbounds i16, i16* %v0, i32 1
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%v3 = load i16, i16* %v0, align 2, !tbaa !0
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br label %b3
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b3: ; preds = %b2, %b1
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%v4 = phi i16 [ %v3, %b2 ], [ %v1, %b1 ]
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%v5 = phi i16* [ %v2, %b2 ], [ %v0, %b1 ]
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%v6 = lshr i16 %v4, 4
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%v7 = zext i16 %v6 to i32
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%v8 = and i32 %v7, 15
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%v9 = icmp ult i32 %v8, 9
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br i1 %v9, label %b4, label %b5
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b4: ; preds = %b3
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call void @llvm.trap()
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unreachable
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b5: ; preds = %b3
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%v10 = lshr i16 %v4, 8
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br label %b1
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}
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; Function Attrs: noreturn nounwind
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declare void @llvm.trap() #1
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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attributes #1 = { noreturn nounwind }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"short", !2}
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!2 = !{!"omnipotent char", !3}
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!3 = !{!"Simple C/C++ TBAA"}
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