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a2f99dc28f
In order to implement a test whether a compare-and-swap succeeded, the SystemZ back-end currently emits a rather inefficient sequence of first converting the CC result into an integer, and then testing that integer against zero. This commit changes the back-end to simply directly test the CC value set by the compare-and-swap instruction. llvm-svn: 322988
172 lines
5.5 KiB
LLVM
172 lines
5.5 KiB
LLVM
; Test 8-bit compare and swap.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-MAIN
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT
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; Check compare and swap with a variable.
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; - CHECK is for the main loop.
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; - CHECK-SHIFT makes sure that the negated shift count used by the second
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; RLL is set up correctly. The negation is independent of the NILL and L
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; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before
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; being used in the RISBG (in contrast to things like atomic addition,
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; which shift %r3 left so that %b is at the high end of the word).
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define i8 @f1(i8 %dummy, i8 *%src, i8 %cmp, i8 %swap) {
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; CHECK-MAIN-LABEL: f1:
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; CHECK-MAIN: risbg [[RISBG:%r[1-9]+]], %r3, 0, 189, 0{{$}}
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; CHECK-MAIN-DAG: sll %r3, 3
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; CHECK-MAIN-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]])
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; CHECK-MAIN: [[LOOP:\.[^ ]*]]:
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; CHECK-MAIN: rll %r2, [[OLD]], 8(%r3)
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; CHECK-MAIN: risbg %r4, %r2, 32, 55, 0
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; CHECK-MAIN: crjlh %r2, %r4, [[EXIT:\.[^ ]*]]
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; CHECK-MAIN: risbg %r5, %r2, 32, 55, 0
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; CHECK-MAIN: rll [[NEW:%r[0-9]+]], %r5, -8({{%r[1-9]+}})
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; CHECK-MAIN: cs [[OLD]], [[NEW]], 0([[RISBG]])
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; CHECK-MAIN: jl [[LOOP]]
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; CHECK-MAIN: [[EXIT]]:
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; CHECK-MAIN-NOT: %r2
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; CHECK-MAIN: br %r14
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;
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; CHECK-SHIFT-LABEL: f1:
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; CHECK-SHIFT: sll [[SHIFT:%r[1-9]+]], 3
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; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
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; CHECK-SHIFT: rll
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; CHECK-SHIFT: rll {{%r[0-9]+}}, %r5, -8([[NEGSHIFT]])
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%pair = cmpxchg i8 *%src, i8 %cmp, i8 %swap seq_cst seq_cst
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%res = extractvalue { i8, i1 } %pair, 0
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ret i8 %res
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}
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; Check compare and swap with constants. We should force the constants into
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; registers and use the sequence above.
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define i8 @f2(i8 *%src) {
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; CHECK-LABEL: f2:
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; CHECK: lhi [[CMP:%r[0-9]+]], 42
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; CHECK: risbg [[CMP]], {{%r[0-9]+}}, 32, 55, 0
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; CHECK: risbg
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; CHECK: br %r14
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;
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; CHECK-SHIFT-LABEL: f2:
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; CHECK-SHIFT: lhi [[SWAP:%r[0-9]+]], 88
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; CHECK-SHIFT: risbg
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; CHECK-SHIFT: risbg [[SWAP]], {{%r[0-9]+}}, 32, 55, 0
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; CHECK-SHIFT: br %r14
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%pair = cmpxchg i8 *%src, i8 42, i8 88 seq_cst seq_cst
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%res = extractvalue { i8, i1 } %pair, 0
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ret i8 %res
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}
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; Check generating the comparison result.
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define i32 @f3(i8 %dummy, i8 *%src, i8 %cmp, i8 %swap) {
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; CHECK-MAIN-LABEL: f3:
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; CHECK-MAIN: risbg [[RISBG:%r[1-9]+]], %r3, 0, 189, 0{{$}}
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; CHECK-MAIN-DAG: sll %r3, 3
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; CHECK-MAIN-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]])
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; CHECK-MAIN: [[LOOP:\.[^ ]*]]:
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; CHECK-MAIN: rll [[TMP:%r[0-9]+]], [[OLD]], 8(%r3)
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; CHECK-MAIN: risbg %r4, [[TMP]], 32, 55, 0
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; CHECK-MAIN: cr [[TMP]], %r4
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; CHECK-MAIN: jlh [[EXIT:\.[^ ]*]]
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; CHECK-MAIN: risbg %r5, [[TMP]], 32, 55, 0
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; CHECK-MAIN: rll [[NEW:%r[0-9]+]], %r5, -8({{%r[1-9]+}})
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; CHECK-MAIN: cs [[OLD]], [[NEW]], 0([[RISBG]])
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; CHECK-MAIN: jl [[LOOP]]
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; CHECK-MAIN: [[EXIT]]:
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; CHECK-MAIN-NEXT: ipm %r2
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; CHECK-MAIN-NEXT: afi %r2, -268435456
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; CHECK-MAIN-NEXT: srl %r2, 31
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; CHECK-MAIN-NOT: %r2
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; CHECK-MAIN: br %r14
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;
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; CHECK-SHIFT-LABEL: f3:
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; CHECK-SHIFT: sll [[SHIFT:%r[1-9]+]], 3
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; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
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; CHECK-SHIFT: rll
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; CHECK-SHIFT: rll {{%r[0-9]+}}, %r5, -8([[NEGSHIFT]])
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%pair = cmpxchg i8 *%src, i8 %cmp, i8 %swap seq_cst seq_cst
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%val = extractvalue { i8, i1 } %pair, 1
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%res = zext i1 %val to i32
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ret i32 %res
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}
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declare void @g()
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; Check using the comparison result for a branch.
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; CHECK-LABEL: f4
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; CHECK-MAIN-LABEL: f4:
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; CHECK-MAIN: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
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; CHECK-MAIN-DAG: sll %r2, 3
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; CHECK-MAIN-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]])
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; CHECK-MAIN: [[LOOP:\.[^ ]*]]:
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; CHECK-MAIN: rll [[TMP:%r[0-9]+]], [[OLD]], 8(%r2)
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; CHECK-MAIN: risbg %r3, [[TMP]], 32, 55, 0
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; CHECK-MAIN: cr [[TMP]], %r3
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; CHECK-MAIN: jlh [[EXIT:\.[^ ]*]]
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; CHECK-MAIN: risbg %r4, [[TMP]], 32, 55, 0
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; CHECK-MAIN: rll [[NEW:%r[0-9]+]], %r4, -8({{%r[1-9]+}})
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; CHECK-MAIN: cs [[OLD]], [[NEW]], 0([[RISBG]])
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; CHECK-MAIN: jl [[LOOP]]
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; CHECK-MAIN: [[EXIT]]:
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; CHECK-MAIN-NEXT: jlh [[LABEL:\.[^ ]*]]
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; CHECK-MAIN: jg g
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; CHECK-MAIN: [[LABEL]]:
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; CHECK-MAIN: br %r14
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;
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; CHECK-SHIFT-LABEL: f4:
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; CHECK-SHIFT: sll %r2, 3
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; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], %r2
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; CHECK-SHIFT: rll
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; CHECK-SHIFT: rll {{%r[0-9]+}}, %r4, -8([[NEGSHIFT]])
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define void @f4(i8 *%src, i8 %cmp, i8 %swap) {
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%pair = cmpxchg i8 *%src, i8 %cmp, i8 %swap seq_cst seq_cst
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%cond = extractvalue { i8, i1 } %pair, 1
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br i1 %cond, label %call, label %exit
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call:
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tail call void @g()
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br label %exit
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exit:
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ret void
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}
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; ... and the same with the inverted direction.
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; CHECK-MAIN-LABEL: f5:
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; CHECK-MAIN: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
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; CHECK-MAIN-DAG: sll %r2, 3
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; CHECK-MAIN-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]])
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; CHECK-MAIN: [[LOOP:\.[^ ]*]]:
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; CHECK-MAIN: rll [[TMP:%r[0-9]+]], [[OLD]], 8(%r2)
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; CHECK-MAIN: risbg %r3, [[TMP]], 32, 55, 0
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; CHECK-MAIN: cr [[TMP]], %r3
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; CHECK-MAIN: jlh [[EXIT:\.[^ ]*]]
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; CHECK-MAIN: risbg %r4, [[TMP]], 32, 55, 0
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; CHECK-MAIN: rll [[NEW:%r[0-9]+]], %r4, -8({{%r[1-9]+}})
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; CHECK-MAIN: cs [[OLD]], [[NEW]], 0([[RISBG]])
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; CHECK-MAIN: jl [[LOOP]]
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; CHECK-MAIN: [[EXIT]]:
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; CHECK-MAIN-NEXT: jlh [[LABEL:\.[^ ]*]]
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; CHECK-MAIN: br %r14
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; CHECK-MAIN: [[LABEL]]:
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; CHECK-MAIN: jg g
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;
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; CHECK-SHIFT-LABEL: f5:
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; CHECK-SHIFT: sll %r2, 3
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; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], %r2
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; CHECK-SHIFT: rll
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; CHECK-SHIFT: rll {{%r[0-9]+}}, %r4, -8([[NEGSHIFT]])
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define void @f5(i8 *%src, i8 %cmp, i8 %swap) {
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%pair = cmpxchg i8 *%src, i8 %cmp, i8 %swap seq_cst seq_cst
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%cond = extractvalue { i8, i1 } %pair, 1
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br i1 %cond, label %exit, label %call
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call:
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tail call void @g()
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br label %exit
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exit:
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ret void
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}
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