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140 lines
4.3 KiB
LLVM
140 lines
4.3 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-darwin10.0.0"
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; Bitcasts between vectors and scalars are valid.
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; PR4487
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define i32 @test1(i64 %a) {
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%t1 = bitcast i64 %a to <2 x i32>
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%t2 = bitcast i64 %a to <2 x i32>
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%t3 = xor <2 x i32> %t1, %t2
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%t4 = extractelement <2 x i32> %t3, i32 0
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ret i32 %t4
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; CHECK: @test1
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; CHECK: ret i32 0
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}
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; Optimize bitcasts that are extracting low element of vector. This happens
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; because of SRoA.
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; rdar://7892780
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define float @test2(<2 x float> %A, <2 x i32> %B) {
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%tmp28 = bitcast <2 x float> %A to i64 ; <i64> [#uses=2]
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%tmp23 = trunc i64 %tmp28 to i32 ; <i32> [#uses=1]
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%tmp24 = bitcast i32 %tmp23 to float ; <float> [#uses=1]
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%tmp = bitcast <2 x i32> %B to i64
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%tmp2 = trunc i64 %tmp to i32 ; <i32> [#uses=1]
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%tmp4 = bitcast i32 %tmp2 to float ; <float> [#uses=1]
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%add = fadd float %tmp24, %tmp4
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ret float %add
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; CHECK: @test2
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; CHECK-NEXT: %tmp24 = extractelement <2 x float> %A, i32 0
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; CHECK-NEXT: bitcast <2 x i32> %B to <2 x float>
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; CHECK-NEXT: %tmp4 = extractelement <2 x float> {{.*}}, i32 0
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; CHECK-NEXT: %add = fadd float %tmp24, %tmp4
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; CHECK-NEXT: ret float %add
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}
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; Optimize bitcasts that are extracting other elements of a vector. This
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; happens because of SRoA.
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; rdar://7892780
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define float @test3(<2 x float> %A, <2 x i64> %B) {
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%tmp28 = bitcast <2 x float> %A to i64
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%tmp29 = lshr i64 %tmp28, 32
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%tmp23 = trunc i64 %tmp29 to i32
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%tmp24 = bitcast i32 %tmp23 to float
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%tmp = bitcast <2 x i64> %B to i128
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%tmp1 = lshr i128 %tmp, 64
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%tmp2 = trunc i128 %tmp1 to i32
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%tmp4 = bitcast i32 %tmp2 to float
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%add = fadd float %tmp24, %tmp4
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ret float %add
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; CHECK: @test3
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; CHECK-NEXT: %tmp24 = extractelement <2 x float> %A, i32 1
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; CHECK-NEXT: bitcast <2 x i64> %B to <4 x float>
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; CHECK-NEXT: %tmp4 = extractelement <4 x float> {{.*}}, i32 2
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; CHECK-NEXT: %add = fadd float %tmp24, %tmp4
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; CHECK-NEXT: ret float %add
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}
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define <2 x i32> @test4(i32 %A, i32 %B){
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%tmp38 = zext i32 %A to i64
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%tmp32 = zext i32 %B to i64
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%tmp33 = shl i64 %tmp32, 32
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%ins35 = or i64 %tmp33, %tmp38
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%tmp43 = bitcast i64 %ins35 to <2 x i32>
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ret <2 x i32> %tmp43
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; CHECK: @test4
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; CHECK-NEXT: insertelement <2 x i32> undef, i32 %A, i32 0
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; CHECK-NEXT: insertelement <2 x i32> {{.*}}, i32 %B, i32 1
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; CHECK-NEXT: ret <2 x i32>
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}
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; rdar://8360454
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define <2 x float> @test5(float %A, float %B) {
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%tmp37 = bitcast float %A to i32
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%tmp38 = zext i32 %tmp37 to i64
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%tmp31 = bitcast float %B to i32
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%tmp32 = zext i32 %tmp31 to i64
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%tmp33 = shl i64 %tmp32, 32
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%ins35 = or i64 %tmp33, %tmp38
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%tmp43 = bitcast i64 %ins35 to <2 x float>
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ret <2 x float> %tmp43
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; CHECK: @test5
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; CHECK-NEXT: insertelement <2 x float> undef, float %A, i32 0
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; CHECK-NEXT: insertelement <2 x float> {{.*}}, float %B, i32 1
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; CHECK-NEXT: ret <2 x float>
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}
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define <2 x float> @test6(float %A){
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%tmp23 = bitcast float %A to i32 ; <i32> [#uses=1]
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%tmp24 = zext i32 %tmp23 to i64 ; <i64> [#uses=1]
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%tmp25 = shl i64 %tmp24, 32 ; <i64> [#uses=1]
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%mask20 = or i64 %tmp25, 1109917696 ; <i64> [#uses=1]
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%tmp35 = bitcast i64 %mask20 to <2 x float> ; <<2 x float>> [#uses=1]
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ret <2 x float> %tmp35
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; CHECK: @test6
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; CHECK-NEXT: insertelement <2 x float> <float 4.200000e+01, float undef>, float %A, i32 1
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; CHECK: ret
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}
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define i64 @ISPC0(i64 %in) {
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%out = and i64 %in, xor (i64 bitcast (<4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1> to i64), i64 -1)
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ret i64 %out
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; CHECK: @ISPC0
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; CHECK: ret i64 0
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}
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define i64 @Vec2(i64 %in) {
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%out = and i64 %in, xor (i64 bitcast (<4 x i16> <i16 0, i16 0, i16 0, i16 0> to i64), i64 0)
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ret i64 %out
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; CHECK: @Vec2
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; CHECK: ret i64 0
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}
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define i64 @All11(i64 %in) {
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%out = and i64 %in, xor (i64 bitcast (<2 x float> bitcast (i64 -1 to <2 x float>) to i64), i64 -1)
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ret i64 %out
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; CHECK: @All11
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; CHECK: ret i64 0
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}
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define i32 @All111(i32 %in) {
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%out = and i32 %in, xor (i32 bitcast (<1 x float> bitcast (i32 -1 to <1 x float>) to i32), i32 -1)
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ret i32 %out
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; CHECK: @All111
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; CHECK: ret i32 0
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}
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