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baf0f69f9a
of the instruction. Note that this change affects the existing non-atomic load and store instructions; the parser now accepts both forms, and the change is noted in the release notes. llvm-svn: 137527
39 lines
1.1 KiB
LLVM
39 lines
1.1 KiB
LLVM
; RUN: opt < %s -jump-threading -loop-rotate -instcombine -indvars -loop-unroll -simplifycfg -S -verify-dom-info -verify-loop-info > %t
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; RUN: grep {store volatile} %t | count 3
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; RUN: not grep {br label} %t
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; Jump threading should not prevent this loop from being unrolled.
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i386-apple-darwin9.6"
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@v1 = external global i32 ; <i32*> [#uses=2]
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define i32 @unroll() nounwind {
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entry:
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br label %bb4
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bb: ; preds = %bb4
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%0 = icmp eq i32 %i.0, 0 ; <i1> [#uses=1]
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br i1 %0, label %bb1, label %bb2
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bb1: ; preds = %bb
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volatile store i32 1000, i32* @v1, align 4
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br label %bb3
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bb2: ; preds = %bb
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volatile store i32 1001, i32* @v1, align 4
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br label %bb3
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bb3: ; preds = %bb2, %bb1
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%1 = add i32 %i.0, 1 ; <i32> [#uses=1]
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br label %bb4
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bb4: ; preds = %bb3, %entry
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%i.0 = phi i32 [ 0, %entry ], [ %1, %bb3 ] ; <i32> [#uses=3]
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%2 = icmp sgt i32 %i.0, 2 ; <i1> [#uses=1]
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br i1 %2, label %bb5, label %bb
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bb5: ; preds = %bb4
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ret i32 0
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}
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