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145 lines
2.8 KiB
TableGen
145 lines
2.8 KiB
TableGen
//=- MicroMips64r6InstrFormats.td - Instruction Formats -*- tablegen -* -=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes microMIPS64r6 instruction formats.
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//
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//===----------------------------------------------------------------------===//
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class DAUI_FM_MMR6 {
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bits<5> rt;
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bits<5> rs;
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bits<16> imm;
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bits<32> Inst;
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let Inst{31-26} = 0b111100;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-0} = imm;
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}
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class POOL32I_ADD_IMM_FM_MMR6<bits<5> funct> {
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bits<5> rs;
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bits<16> imm;
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bits<32> Inst;
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let Inst{31-26} = 0b010000;
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let Inst{25-21} = funct;
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let Inst{20-16} = rs;
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let Inst{15-0} = imm;
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}
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class POOL32S_EXTBITS_FM_MMR6<bits<6> funct> {
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bits<5> rt;
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bits<5> rs;
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bits<5> size;
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bits<5> pos;
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bits<32> Inst;
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let Inst{31-26} = 0b010110;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-11} = size;
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let Inst{10-6} = pos;
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let Inst{5-0} = funct;
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}
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class POOL32S_DALIGN_FM_MMR6 {
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bits<5> rs;
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bits<5> rt;
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bits<5> rd;
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bits<3> bp;
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bits<32> Inst;
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let Inst{31-26} = 0b010110;
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let Inst{25-21} = rs;
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let Inst{20-16} = rt;
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let Inst{15-11} = rd;
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let Inst{10-8} = bp;
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let Inst{7-6} = 0b00;
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let Inst{5-0} = 0b011100;
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}
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class POOL32A_DIVMOD_FM_MMR6<string instr_asm, bits<9> funct>
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: MMR6Arch<instr_asm> {
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bits<5> rt;
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bits<5> rs;
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bits<5> rd;
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bits<32> Inst;
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let Inst{31-26} = 0b010110;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-11} = rd;
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let Inst{10-9} = 0b00;
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let Inst{8-0} = funct;
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}
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class POOL32S_DMFTC0_FM_MMR6<string instr_asm, bits<5> funct>
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: MMR6Arch<instr_asm>, MipsR6Inst {
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bits<5> rt;
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bits<5> rs;
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bits<3> sel;
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bits<32> Inst;
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let Inst{31-26} = 0b010110;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-14} = 0;
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let Inst{13-11} = sel;
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let Inst{10-6} = funct;
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let Inst{5-0} = 0b111100;
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}
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class POOL32S_ARITH_FM_MMR6<string opstr, bits<9> funct>
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: MMR6Arch<opstr> {
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bits<5> rt;
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bits<5> rs;
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bits<5> rd;
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bits<32> Inst;
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let Inst{31-26} = 0b010110;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-11} = rd;
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let Inst{10-9} = 0b00;
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let Inst{8-0} = funct;
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}
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class DADDIU_FM_MMR6<string opstr> : MMR6Arch<opstr> {
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bits<5> rt;
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bits<5> rs;
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bits<16> imm16;
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bits<32> Inst;
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let Inst{31-26} = 0b010111;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-0} = imm16;
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}
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class PCREL18_FM_MMR6<bits<3> funct> : MipsR6Inst {
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bits<5> rt;
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bits<18> imm;
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bits<32> Inst;
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let Inst{31-26} = 0b011110;
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let Inst{25-21} = rt;
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let Inst{20-18} = funct;
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let Inst{17-0} = imm;
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}
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