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1b73eef3b4
Split from D17490. This patch improves support for determining the demanded vector elements through SSE scalar intrinsics: 1 - demanded vector element support for unary and some extra binary scalar intrinsics (RCP/RSQRT/SQRT/FRCZ and ADD/CMP/DIV/ROUND). 2 - addss/addsd get simplified to a fadd call if we aren't interested in the pass through elements 3 - if we don't need the lowest element of a scalar operation then just use the first argument (the pass through elements) directly We can add support for propagating demanded elements through any equivalent packed SSE intrinsics in a future patch (these wouldn't use the pass through patterns). Differential Revision: http://reviews.llvm.org/D19318 llvm-svn: 267357
99 lines
4.8 KiB
LLVM
99 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define <2 x double> @test_round_sd(<2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: @test_round_sd(
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; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a, <2 x double> %b, i32 10)
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; CHECK-NEXT: ret <2 x double> [[TMP1]]
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;
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%1 = insertelement <2 x double> %a, double 1.000000e+00, i32 0
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%2 = insertelement <2 x double> %b, double 2.000000e+00, i32 1
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%3 = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %1, <2 x double> %2, i32 10)
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ret <2 x double> %3
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}
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define double @test_round_sd_0(double %a, double %b) {
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; CHECK-LABEL: @test_round_sd_0(
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %b, i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> undef, <2 x double> [[TMP1]], i32 10)
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; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0
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; CHECK-NEXT: ret double [[TMP3]]
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;
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%1 = insertelement <2 x double> undef, double %a, i32 0
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%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
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%3 = insertelement <2 x double> undef, double %b, i32 0
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%4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
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%5 = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %2, <2 x double> %4, i32 10)
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%6 = extractelement <2 x double> %5, i32 0
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ret double %6
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}
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define double @test_round_sd_1(double %a, double %b) {
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; CHECK-LABEL: @test_round_sd_1(
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; CHECK-NEXT: ret double 1.000000e+00
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;
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%1 = insertelement <2 x double> undef, double %a, i32 0
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%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
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%3 = insertelement <2 x double> undef, double %b, i32 0
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%4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
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%5 = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %2, <2 x double> %4, i32 10)
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%6 = extractelement <2 x double> %5, i32 1
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ret double %6
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}
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define <4 x float> @test_round_ss(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: @test_round_ss(
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; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> <float undef, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, <4 x float> %b, i32 10)
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; CHECK-NEXT: ret <4 x float> [[TMP1]]
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;
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%1 = insertelement <4 x float> %a, float 1.000000e+00, i32 1
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%2 = insertelement <4 x float> %1, float 2.000000e+00, i32 2
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%3 = insertelement <4 x float> %2, float 3.000000e+00, i32 3
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%4 = insertelement <4 x float> %b, float 1.000000e+00, i32 1
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%5 = insertelement <4 x float> %4, float 2.000000e+00, i32 2
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%6 = insertelement <4 x float> %5, float 3.000000e+00, i32 3
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%7 = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %3, <4 x float> %6, i32 10)
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ret <4 x float> %7
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}
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define float @test_round_ss_0(float %a, float %b) {
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; CHECK-LABEL: @test_round_ss_0(
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %b, i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> undef, <4 x float> [[TMP1]], i32 10)
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; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
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; CHECK-NEXT: ret float [[R]]
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;
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%1 = insertelement <4 x float> undef, float %a, i32 0
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%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
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%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
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%4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
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%5 = insertelement <4 x float> undef, float %b, i32 0
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%6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
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%7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
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%8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
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%9 = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %4, <4 x float> %8, i32 10)
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%r = extractelement <4 x float> %9, i32 0
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ret float %r
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}
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define float @test_round_ss_2(float %a, float %b) {
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; CHECK-LABEL: @test_round_ss_2(
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; CHECK-NEXT: ret float 2.000000e+00
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;
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%1 = insertelement <4 x float> undef, float %a, i32 0
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%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
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%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
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%4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
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%5 = insertelement <4 x float> undef, float %b, i32 0
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%6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
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%7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
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%8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
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%9 = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %4, <4 x float> %8, i32 10)
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%r = extractelement <4 x float> %9, i32 2
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ret float %r
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}
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declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) nounwind readnone
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declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32) nounwind readnone
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