Simon Dardis 055516f72f [mips] Correct c.cond.fmt instruction definition. ... Permit explicit $fcc<X> operand in c.cond.fmt instruction. Add c.cond.fmt to the MIPS to microMIPS instruction mapping table. Check that $fcc1 - $fcc7 are unusable for MIPS-I to MIPS-III for c.cond.fmt, bc1t, bc1f. Reviewers: seanbruno, zoran.jovanovic, vkalintiris Differential Revision: https://reviews.llvm.org/D24510 llvm-svn: 292117		2017-01-16 13:55:58 +00:00
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AArch64	AArch64: TableGenerate system instruction operands.	2016-07-05 21:23:04 +00:00
AMDGPU	[AMDGPU] Disassembler: fix for disaasembling v_mac_f32/16_dpp/sdwa	2016-12-22 11:30:48 +00:00
ARM	[ARM] Saturation instructions are DSP-only	2016-07-25 22:25:25 +00:00
Hexagon	[Hexagon] Treat all conditional branches as predicted (not-taken by default)	2016-05-09 18:22:07 +00:00
Lanai	[lanai] Add Lanai backend.	2016-03-28 13:09:54 +00:00
Mips	[mips] Correct c.cond.fmt instruction definition.	2017-01-16 13:55:58 +00:00
PowerPC	[PowerPC] Implement missing ISA 2.06 instructions.	2017-01-05 15:00:45 +00:00
Sparc	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
SystemZ	[SystemZ] Support remaining atomic instructions	2016-12-02 18:24:16 +00:00
X86	[AVX-512] Teach the disassembler about all of the EVEX gather and scatter instructions.	2017-01-16 05:44:33 +00:00
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