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llvm-mirror/lib/Target/ARC/ARCTargetMachine.cpp
Pete Couperus e62b338f26 [ARC] Add ARCOptAddrMode pass to generate postincrement loads/stores.
Build on newly introduced ARC postincrement loads/stores from r356200.

Patch By Denis Antrushin! <denis@synopsys.com>

Differential Revision: https://reviews.llvm.org/D59409

llvm-svn: 356606
2019-03-20 20:06:21 +00:00

91 lines
2.9 KiB
C++

//===- ARCTargetMachine.cpp - Define TargetMachine for ARC ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
//
//===----------------------------------------------------------------------===//
#include "ARCTargetMachine.h"
#include "ARC.h"
#include "ARCTargetTransformInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
static Reloc::Model getRelocModel(Optional<Reloc::Model> RM) {
if (!RM.hasValue())
return Reloc::Static;
return *RM;
}
/// ARCTargetMachine ctor - Create an ILP32 architecture model
ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T,
"e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
"f32:32:32-i64:32-f64:32-a:0:32-n32",
TT, CPU, FS, Options, getRelocModel(RM),
getEffectiveCodeModel(CM, CodeModel::Small), OL),
TLOF(make_unique<TargetLoweringObjectFileELF>()),
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
}
ARCTargetMachine::~ARCTargetMachine() = default;
namespace {
/// ARC Code Generator Pass Configuration Options.
class ARCPassConfig : public TargetPassConfig {
public:
ARCPassConfig(ARCTargetMachine &TM, PassManagerBase &PM)
: TargetPassConfig(TM, PM) {}
ARCTargetMachine &getARCTargetMachine() const {
return getTM<ARCTargetMachine>();
}
bool addInstSelector() override;
void addPreEmitPass() override;
void addPreRegAlloc() override;
};
} // end anonymous namespace
TargetPassConfig *ARCTargetMachine::createPassConfig(PassManagerBase &PM) {
return new ARCPassConfig(*this, PM);
}
bool ARCPassConfig::addInstSelector() {
addPass(createARCISelDag(getARCTargetMachine(), getOptLevel()));
return false;
}
void ARCPassConfig::addPreEmitPass() { addPass(createARCBranchFinalizePass()); }
void ARCPassConfig::addPreRegAlloc() {
addPass(createARCExpandPseudosPass());
addPass(createARCOptAddrMode());
}
// Force static initialization.
extern "C" void LLVMInitializeARCTarget() {
RegisterTargetMachine<ARCTargetMachine> X(getTheARCTarget());
}
TargetTransformInfo
ARCTargetMachine::getTargetTransformInfo(const Function &F) {
return TargetTransformInfo(ARCTTIImpl(this, F));
}