1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-31 16:02:52 +01:00
llvm-mirror/test/CodeGen/X86/h-registers-0.ll
Stephen Lin 7e501cf4c3 Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
This update was done with the following bash script:

  find test/CodeGen -name "*.ll" | \
  while read NAME; do
    echo "$NAME"
    if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
      TEMP=`mktemp -t temp`
      cp $NAME $TEMP
      sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
      while read FUNC; do
        sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
      done
      sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
      sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
      sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
      sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
      mv $TEMP $NAME
    fi
  done

llvm-svn: 186280
2013-07-14 06:24:09 +00:00

107 lines
2.3 KiB
LLVM

; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X86-32
; Use h registers. On x86-64, codegen doesn't support general allocation
; of h registers yet, due to x86 encoding complications.
define void @bar64(i64 inreg %x, i8* inreg %p) nounwind {
; X86-64-LABEL: bar64:
; X86-64: shrq $8, %rdi
; X86-64: incb %dil
; See FIXME: on regclass GR8.
; It could be optimally transformed like; incb %ch; movb %ch, (%rdx)
; WIN64-LABEL: bar64:
; WIN64: shrq $8, %rcx
; WIN64: incb %cl
; X86-32-LABEL: bar64:
; X86-32: incb %ah
%t0 = lshr i64 %x, 8
%t1 = trunc i64 %t0 to i8
%t2 = add i8 %t1, 1
store i8 %t2, i8* %p
ret void
}
define void @bar32(i32 inreg %x, i8* inreg %p) nounwind {
; X86-64-LABEL: bar32:
; X86-64: shrl $8, %edi
; X86-64: incb %dil
; WIN64-LABEL: bar32:
; WIN64: shrl $8, %ecx
; WIN64: incb %cl
; X86-32-LABEL: bar32:
; X86-32: incb %ah
%t0 = lshr i32 %x, 8
%t1 = trunc i32 %t0 to i8
%t2 = add i8 %t1, 1
store i8 %t2, i8* %p
ret void
}
define void @bar16(i16 inreg %x, i8* inreg %p) nounwind {
; X86-64-LABEL: bar16:
; X86-64: shrl $8, %edi
; X86-64: incb %dil
; WIN64-LABEL: bar16:
; WIN64: shrl $8, %ecx
; WIN64: incb %cl
; X86-32-LABEL: bar16:
; X86-32: incb %ah
%t0 = lshr i16 %x, 8
%t1 = trunc i16 %t0 to i8
%t2 = add i8 %t1, 1
store i8 %t2, i8* %p
ret void
}
define i64 @qux64(i64 inreg %x) nounwind {
; X86-64-LABEL: qux64:
; X86-64: movq %rdi, %rax
; X86-64: movzbl %ah, %eax
; WIN64-LABEL: qux64:
; WIN64: movzbl %ch, %eax
; X86-32-LABEL: qux64:
; X86-32: movzbl %ah, %eax
%t0 = lshr i64 %x, 8
%t1 = and i64 %t0, 255
ret i64 %t1
}
define i32 @qux32(i32 inreg %x) nounwind {
; X86-64-LABEL: qux32:
; X86-64: movl %edi, %eax
; X86-64: movzbl %ah, %eax
; WIN64-LABEL: qux32:
; WIN64: movzbl %ch, %eax
; X86-32-LABEL: qux32:
; X86-32: movzbl %ah, %eax
%t0 = lshr i32 %x, 8
%t1 = and i32 %t0, 255
ret i32 %t1
}
define i16 @qux16(i16 inreg %x) nounwind {
; X86-64-LABEL: qux16:
; X86-64: movl %edi, %eax
; X86-64: movzbl %ah, %eax
; WIN64-LABEL: qux16:
; WIN64: movzbl %ch, %eax
; X86-32-LABEL: qux16:
; X86-32: movzbl %ah, %eax
%t0 = lshr i16 %x, 8
ret i16 %t0
}