mirror of
https://github.com/RPCS3/llvm-mirror.git
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8fc62308ad
Summary: This patch add the InstAlias definitions for below instructions. ADDI ADDIS ADDI8 ADDIS8 RLWINM8 ISEL ISEL8 OR OR_rec ORI ORI8 XORI8 CNTLZW8 CNTLZW8_rec TEND TSR RFEBB NOR NOR_rec MTCRF SUBF SUBF_rec SUBFC SUBFC_rec RLDICL_32_64 TW Reviewed By: steven.zhang Differential Revision: https://reviews.llvm.org/D77559
340 lines
9.3 KiB
LLVM
340 lines
9.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mattr=+popcntd < %s | FileCheck %s --check-prefixes=ANY,FAST
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mattr=+slow-popcntd < %s | FileCheck %s --check-prefixes=ANY,SLOW
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define i16 @zpop_i8_i16(i8 %x) {
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; FAST-LABEL: zpop_i8_i16:
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; FAST: # %bb.0:
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; FAST-NEXT: clrldi 3, 3, 56
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; FAST-NEXT: popcntd 3, 3
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; FAST-NEXT: blr
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;
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; SLOW-LABEL: zpop_i8_i16:
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; SLOW: # %bb.0:
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; SLOW-NEXT: clrlwi 5, 3, 24
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; SLOW-NEXT: rotlwi 3, 3, 31
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; SLOW-NEXT: andi. 3, 3, 85
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; SLOW-NEXT: lis 4, 13107
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; SLOW-NEXT: sub 3, 5, 3
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; SLOW-NEXT: ori 4, 4, 13107
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; SLOW-NEXT: rotlwi 5, 3, 30
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; SLOW-NEXT: and 3, 3, 4
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; SLOW-NEXT: andis. 4, 5, 13107
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; SLOW-NEXT: andi. 5, 5, 13107
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; SLOW-NEXT: or 4, 5, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 5, 3855
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; SLOW-NEXT: srwi 4, 3, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 4, 257
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; SLOW-NEXT: ori 5, 5, 3855
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; SLOW-NEXT: and 3, 3, 5
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; SLOW-NEXT: ori 4, 4, 257
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; SLOW-NEXT: mullw 3, 3, 4
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; SLOW-NEXT: srwi 3, 3, 24
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; SLOW-NEXT: blr
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%z = zext i8 %x to i16
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%pop = tail call i16 @llvm.ctpop.i16(i16 %z)
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ret i16 %pop
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}
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define i16 @popz_i8_i16(i8 %x) {
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; FAST-LABEL: popz_i8_i16:
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; FAST: # %bb.0:
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; FAST-NEXT: clrldi 3, 3, 56
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; FAST-NEXT: popcntd 3, 3
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; FAST-NEXT: blr
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;
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; SLOW-LABEL: popz_i8_i16:
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; SLOW: # %bb.0:
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; SLOW-NEXT: clrlwi 5, 3, 24
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; SLOW-NEXT: rotlwi 3, 3, 31
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; SLOW-NEXT: andi. 3, 3, 85
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; SLOW-NEXT: lis 4, 13107
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; SLOW-NEXT: sub 3, 5, 3
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; SLOW-NEXT: ori 4, 4, 13107
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; SLOW-NEXT: rotlwi 5, 3, 30
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; SLOW-NEXT: and 3, 3, 4
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; SLOW-NEXT: andis. 4, 5, 13107
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; SLOW-NEXT: andi. 5, 5, 13107
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; SLOW-NEXT: or 4, 5, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 5, 3855
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; SLOW-NEXT: srwi 4, 3, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 4, 257
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; SLOW-NEXT: ori 5, 5, 3855
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; SLOW-NEXT: and 3, 3, 5
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; SLOW-NEXT: ori 4, 4, 257
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; SLOW-NEXT: mullw 3, 3, 4
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; SLOW-NEXT: rlwinm 3, 3, 8, 24, 31
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; SLOW-NEXT: blr
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%pop = tail call i8 @llvm.ctpop.i8(i8 %x)
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%z = zext i8 %pop to i16
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ret i16 %z
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}
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define i32 @zpop_i8_i32(i8 %x) {
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; FAST-LABEL: zpop_i8_i32:
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; FAST: # %bb.0:
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; FAST-NEXT: clrlwi 3, 3, 24
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; FAST-NEXT: popcntw 3, 3
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; FAST-NEXT: blr
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;
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; SLOW-LABEL: zpop_i8_i32:
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; SLOW: # %bb.0:
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; SLOW-NEXT: clrlwi 5, 3, 24
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; SLOW-NEXT: rotlwi 3, 3, 31
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; SLOW-NEXT: andi. 3, 3, 85
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; SLOW-NEXT: lis 4, 13107
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; SLOW-NEXT: sub 3, 5, 3
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; SLOW-NEXT: ori 4, 4, 13107
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; SLOW-NEXT: rotlwi 5, 3, 30
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; SLOW-NEXT: and 3, 3, 4
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; SLOW-NEXT: andis. 4, 5, 13107
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; SLOW-NEXT: andi. 5, 5, 13107
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; SLOW-NEXT: or 4, 5, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 5, 3855
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; SLOW-NEXT: srwi 4, 3, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 4, 257
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; SLOW-NEXT: ori 5, 5, 3855
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; SLOW-NEXT: and 3, 3, 5
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; SLOW-NEXT: ori 4, 4, 257
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; SLOW-NEXT: mullw 3, 3, 4
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; SLOW-NEXT: srwi 3, 3, 24
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; SLOW-NEXT: blr
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%z = zext i8 %x to i32
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%pop = tail call i32 @llvm.ctpop.i32(i32 %z)
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ret i32 %pop
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}
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define i32 @popz_i8_32(i8 %x) {
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; FAST-LABEL: popz_i8_32:
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; FAST: # %bb.0:
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; FAST-NEXT: clrldi 3, 3, 56
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; FAST-NEXT: popcntd 3, 3
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; FAST-NEXT: blr
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;
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; SLOW-LABEL: popz_i8_32:
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; SLOW: # %bb.0:
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; SLOW-NEXT: clrlwi 5, 3, 24
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; SLOW-NEXT: rotlwi 3, 3, 31
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; SLOW-NEXT: andi. 3, 3, 85
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; SLOW-NEXT: lis 4, 13107
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; SLOW-NEXT: sub 3, 5, 3
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; SLOW-NEXT: ori 4, 4, 13107
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; SLOW-NEXT: rotlwi 5, 3, 30
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; SLOW-NEXT: and 3, 3, 4
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; SLOW-NEXT: andis. 4, 5, 13107
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; SLOW-NEXT: andi. 5, 5, 13107
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; SLOW-NEXT: or 4, 5, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 5, 3855
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; SLOW-NEXT: srwi 4, 3, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 4, 257
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; SLOW-NEXT: ori 5, 5, 3855
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; SLOW-NEXT: and 3, 3, 5
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; SLOW-NEXT: ori 4, 4, 257
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; SLOW-NEXT: mullw 3, 3, 4
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; SLOW-NEXT: rlwinm 3, 3, 8, 24, 31
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; SLOW-NEXT: blr
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%pop = tail call i8 @llvm.ctpop.i8(i8 %x)
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%z = zext i8 %pop to i32
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ret i32 %z
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}
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define i32 @zpop_i16_i32(i16 %x) {
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; FAST-LABEL: zpop_i16_i32:
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; FAST: # %bb.0:
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; FAST-NEXT: clrlwi 3, 3, 16
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; FAST-NEXT: popcntw 3, 3
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; FAST-NEXT: blr
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;
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; SLOW-LABEL: zpop_i16_i32:
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; SLOW: # %bb.0:
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; SLOW-NEXT: clrlwi 5, 3, 16
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; SLOW-NEXT: rotlwi 3, 3, 31
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; SLOW-NEXT: andi. 3, 3, 21845
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; SLOW-NEXT: lis 4, 13107
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; SLOW-NEXT: sub 3, 5, 3
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; SLOW-NEXT: ori 4, 4, 13107
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; SLOW-NEXT: rotlwi 5, 3, 30
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; SLOW-NEXT: and 3, 3, 4
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; SLOW-NEXT: andis. 4, 5, 13107
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; SLOW-NEXT: andi. 5, 5, 13107
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; SLOW-NEXT: or 4, 5, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 5, 3855
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; SLOW-NEXT: srwi 4, 3, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 4, 257
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; SLOW-NEXT: ori 5, 5, 3855
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; SLOW-NEXT: and 3, 3, 5
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; SLOW-NEXT: ori 4, 4, 257
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; SLOW-NEXT: mullw 3, 3, 4
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; SLOW-NEXT: srwi 3, 3, 24
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; SLOW-NEXT: blr
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%z = zext i16 %x to i32
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%pop = tail call i32 @llvm.ctpop.i32(i32 %z)
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ret i32 %pop
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}
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define i32 @popz_i16_32(i16 %x) {
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; FAST-LABEL: popz_i16_32:
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; FAST: # %bb.0:
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; FAST-NEXT: clrldi 3, 3, 48
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; FAST-NEXT: popcntd 3, 3
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; FAST-NEXT: blr
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;
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; SLOW-LABEL: popz_i16_32:
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; SLOW: # %bb.0:
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; SLOW-NEXT: clrlwi 5, 3, 16
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; SLOW-NEXT: rotlwi 3, 3, 31
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; SLOW-NEXT: andi. 3, 3, 21845
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; SLOW-NEXT: lis 4, 13107
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; SLOW-NEXT: sub 3, 5, 3
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; SLOW-NEXT: ori 4, 4, 13107
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; SLOW-NEXT: rotlwi 5, 3, 30
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; SLOW-NEXT: and 3, 3, 4
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; SLOW-NEXT: andis. 4, 5, 13107
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; SLOW-NEXT: andi. 5, 5, 13107
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; SLOW-NEXT: or 4, 5, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 5, 3855
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; SLOW-NEXT: srwi 4, 3, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 4, 257
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; SLOW-NEXT: ori 5, 5, 3855
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; SLOW-NEXT: and 3, 3, 5
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; SLOW-NEXT: ori 4, 4, 257
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; SLOW-NEXT: mullw 3, 3, 4
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; SLOW-NEXT: rlwinm 3, 3, 8, 24, 31
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; SLOW-NEXT: blr
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%pop = tail call i16 @llvm.ctpop.i16(i16 %x)
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%z = zext i16 %pop to i32
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ret i32 %z
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}
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define i64 @zpop_i32_i64(i32 %x) {
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; FAST-LABEL: zpop_i32_i64:
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; FAST: # %bb.0:
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; FAST-NEXT: clrldi 3, 3, 32
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; FAST-NEXT: popcntd 3, 3
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; FAST-NEXT: blr
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;
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; SLOW-LABEL: zpop_i32_i64:
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; SLOW: # %bb.0:
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; SLOW-NEXT: rlwinm 5, 3, 31, 1, 0
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; SLOW-NEXT: lis 4, 13107
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; SLOW-NEXT: andis. 6, 5, 21845
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; SLOW-NEXT: andi. 5, 5, 21845
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; SLOW-NEXT: ori 4, 4, 13107
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; SLOW-NEXT: or 5, 5, 6
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; SLOW-NEXT: clrldi 3, 3, 32
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; SLOW-NEXT: rldimi 4, 4, 32, 0
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; SLOW-NEXT: sub 3, 3, 5
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; SLOW-NEXT: and 5, 3, 4
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; SLOW-NEXT: rotldi 3, 3, 62
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; SLOW-NEXT: and 3, 3, 4
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; SLOW-NEXT: add 3, 5, 3
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; SLOW-NEXT: lis 4, 3855
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; SLOW-NEXT: rldicl 5, 3, 60, 4
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; SLOW-NEXT: ori 4, 4, 3855
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; SLOW-NEXT: add 3, 3, 5
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; SLOW-NEXT: lis 5, 257
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; SLOW-NEXT: rldimi 4, 4, 32, 0
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; SLOW-NEXT: ori 5, 5, 257
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; SLOW-NEXT: and 3, 3, 4
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; SLOW-NEXT: rldimi 5, 5, 32, 0
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; SLOW-NEXT: mulld 3, 3, 5
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; SLOW-NEXT: rldicl 3, 3, 8, 56
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; SLOW-NEXT: blr
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%z = zext i32 %x to i64
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%pop = tail call i64 @llvm.ctpop.i64(i64 %z)
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ret i64 %pop
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}
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define i64 @popz_i32_i64(i32 %x) {
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; FAST-LABEL: popz_i32_i64:
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; FAST: # %bb.0:
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; FAST-NEXT: popcntw 3, 3
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; FAST-NEXT: clrldi 3, 3, 32
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; FAST-NEXT: blr
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;
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; SLOW-LABEL: popz_i32_i64:
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; SLOW: # %bb.0:
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; SLOW-NEXT: rotlwi 5, 3, 31
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; SLOW-NEXT: andis. 6, 5, 21845
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; SLOW-NEXT: andi. 5, 5, 21845
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; SLOW-NEXT: or 5, 5, 6
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; SLOW-NEXT: lis 4, 13107
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; SLOW-NEXT: sub 3, 3, 5
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; SLOW-NEXT: ori 4, 4, 13107
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; SLOW-NEXT: rotlwi 5, 3, 30
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; SLOW-NEXT: and 3, 3, 4
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; SLOW-NEXT: andis. 4, 5, 13107
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; SLOW-NEXT: andi. 5, 5, 13107
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; SLOW-NEXT: or 4, 5, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 5, 3855
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; SLOW-NEXT: srwi 4, 3, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 4, 257
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; SLOW-NEXT: ori 5, 5, 3855
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; SLOW-NEXT: and 3, 3, 5
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; SLOW-NEXT: ori 4, 4, 257
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; SLOW-NEXT: mullw 3, 3, 4
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; SLOW-NEXT: rlwinm 3, 3, 8, 24, 31
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; SLOW-NEXT: blr
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%pop = tail call i32 @llvm.ctpop.i32(i32 %x)
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%z = zext i32 %pop to i64
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ret i64 %z
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}
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define i64 @popa_i16_i64(i16 %x) {
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; FAST-LABEL: popa_i16_i64:
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; FAST: # %bb.0:
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; FAST-NEXT: clrldi 3, 3, 48
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; FAST-NEXT: popcntd 3, 3
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; FAST-NEXT: rlwinm 3, 3, 0, 27, 27
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; FAST-NEXT: blr
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;
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; SLOW-LABEL: popa_i16_i64:
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; SLOW: # %bb.0:
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; SLOW-NEXT: clrlwi 5, 3, 16
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; SLOW-NEXT: rotlwi 3, 3, 31
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; SLOW-NEXT: andi. 3, 3, 21845
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; SLOW-NEXT: lis 4, 13107
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; SLOW-NEXT: sub 3, 5, 3
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; SLOW-NEXT: ori 4, 4, 13107
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; SLOW-NEXT: rotlwi 5, 3, 30
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; SLOW-NEXT: and 3, 3, 4
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; SLOW-NEXT: andis. 4, 5, 13107
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; SLOW-NEXT: andi. 5, 5, 13107
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; SLOW-NEXT: or 4, 5, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 5, 3855
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; SLOW-NEXT: srwi 4, 3, 4
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; SLOW-NEXT: add 3, 3, 4
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; SLOW-NEXT: lis 4, 257
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; SLOW-NEXT: ori 5, 5, 3855
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; SLOW-NEXT: and 3, 3, 5
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; SLOW-NEXT: ori 4, 4, 257
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; SLOW-NEXT: mullw 3, 3, 4
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; SLOW-NEXT: srwi 3, 3, 24
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; SLOW-NEXT: rlwinm 3, 3, 0, 27, 27
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; SLOW-NEXT: blr
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%pop = call i16 @llvm.ctpop.i16(i16 %x)
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%z = zext i16 %pop to i64 ; SimplifyDemandedBits may turn zext (or sext) into aext
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%a = and i64 %z, 16
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ret i64 %a
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}
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declare i8 @llvm.ctpop.i8(i8) nounwind readnone
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declare i16 @llvm.ctpop.i16(i16) nounwind readnone
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declare i32 @llvm.ctpop.i32(i32) nounwind readnone
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declare i64 @llvm.ctpop.i64(i64) nounwind readnone
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