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d4eb9291fa
We don't need to reject all inline asm as using the counter register (most does not). Only those that explicitly clobber the counter register need to prevent the transformation. llvm-svn: 182191
39 lines
1.2 KiB
LLVM
39 lines
1.2 KiB
LLVM
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-freebsd10.0"
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; RUN: llc < %s -march=ppc64 | FileCheck %s
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define void @test1(i32 %c) nounwind {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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call void asm sideeffect "", "~{r5}"() nounwind
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%inc = add nsw i32 %i.01, 1
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%exitcond = icmp eq i32 %inc, 2048
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret void
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; CHECK: @test1
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; CHECK: mtctr
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}
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define void @test2(i32 %c) nounwind {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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call void asm sideeffect "", "~{ctr}"() nounwind
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%inc = add nsw i32 %i.01, 1
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%exitcond = icmp eq i32 %inc, 2048
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret void
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; CHECK: @test2
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; CHECK-NOT: mtctr
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}
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