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a5a86f0a8e
Unaligned access is supported on PPC for non-vector types, and is generally more efficient than manually expanding the loads and stores. A few of the existing test cases were using expanded unaligned loads and stores to test other features (like load/store with update), and for these test cases, unaligned access remains disabled. llvm-svn: 177160
74 lines
1.4 KiB
LLVM
74 lines
1.4 KiB
LLVM
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s
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target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32"
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define void @foo1(i16* %p, i16* %r) nounwind {
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entry:
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%v = load i16* %p, align 1
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store i16 %v, i16* %r, align 1
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ret void
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; CHECK: @foo1
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; CHECK: lhz
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; CHECK: sth
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}
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define void @foo2(i32* %p, i32* %r) nounwind {
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entry:
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%v = load i32* %p, align 1
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store i32 %v, i32* %r, align 1
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ret void
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; CHECK: @foo2
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; CHECK: lwz
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; CHECK: stw
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}
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define void @foo3(i64* %p, i64* %r) nounwind {
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entry:
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%v = load i64* %p, align 1
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store i64 %v, i64* %r, align 1
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ret void
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; CHECK: @foo3
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; CHECK: ld
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; CHECK: std
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}
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define void @foo4(float* %p, float* %r) nounwind {
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entry:
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%v = load float* %p, align 1
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store float %v, float* %r, align 1
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ret void
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; CHECK: @foo4
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; CHECK: lfs
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; CHECK: stfs
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}
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define void @foo5(double* %p, double* %r) nounwind {
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entry:
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%v = load double* %p, align 1
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store double %v, double* %r, align 1
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ret void
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; CHECK: @foo5
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; CHECK: lfd
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; CHECK: stfd
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}
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define void @foo6(<4 x float>* %p, <4 x float>* %r) nounwind {
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entry:
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%v = load <4 x float>* %p, align 1
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store <4 x float> %v, <4 x float>* %r, align 1
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ret void
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; These loads and stores are legalized into aligned loads and stores
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; using aligned stack slots.
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; CHECK: @foo6
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; CHECK: ld
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; CHECK: ld
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; CHECK: std
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; CHECK: std
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}
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