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262321d1ff
This patch lets the llvm tools handle the new HVX target features that are added by frontend (clang). The target-features are of the form "hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX. "hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated. The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}. Eg: "+hvxv62" For the correct HVX code generation, the user must use the following target features. For 64B mode: "+hvxv62" "+hvx-length64b" For 128B mode: "+hvxv62" "+hvx-length128b" Clang picks a default length if none is specified. If for some reason, no hvx-length is specified to llvm, the compilation will bail out. There is a corresponding clang patch. Differential Revision: https://reviews.llvm.org/D38851 llvm-svn: 316101
34 lines
938 B
LLVM
34 lines
938 B
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; REQUIRES: asserts
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; This testcase used to crash due to putting the bitsplit instruction in a
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; wrong place.
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; CHECK: bitsplit
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target triple = "hexagon"
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define hidden fastcc i32 @fred(i32 %a0) unnamed_addr #0 {
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b1:
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%v2 = lshr i32 %a0, 16
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%v3 = trunc i32 %v2 to i8
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br i1 undef, label %b6, label %b4
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b4: ; preds = %b1
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%v5 = and i32 %a0, 65535
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br i1 undef, label %b8, label %b9
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b6: ; preds = %b1
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%v7 = and i32 %a0, 65535
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br label %b9
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b8: ; preds = %b4
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store i8 %v3, i8* undef, align 2
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unreachable
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b9: ; preds = %b6, %b4
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%v10 = phi i32 [ %v7, %b6 ], [ %v5, %b4 ]
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ret i32 %v10
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}
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attributes #0 = { nounwind optsize "target-cpu"="hexagonv60" "target-features"="-hvxv60,-long-calls" }
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