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AArch64
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AArch64LoadStoreOptimizer: Update kill flags when merging stores
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2017-01-20 18:04:27 +00:00 |
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AMDGPU
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AMDGPU/R600: Serialize vector trunc stores to private AS
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2017-01-20 21:24:26 +00:00 |
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ARM
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[Thumb] Add support for tMUL in the compare instruction peephole optimizer.
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2017-01-20 13:10:12 +00:00 |
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AVR
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[AVR] Implement TargetLoweing::getRegisterByName
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2017-01-07 23:39:47 +00:00 |
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BPF
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[bpf] error when unknown bpf helper is called
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2017-01-17 07:26:17 +00:00 |
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Generic
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Reverted: Track validity of pass results
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2017-01-15 10:23:18 +00:00 |
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Hexagon
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Treat segment [B, E) as not overlapping block with boundaries [A, B)
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2017-01-18 23:12:19 +00:00 |
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Inputs
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Lanai
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Mips
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Reverted: Track validity of pass results
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2017-01-15 10:23:18 +00:00 |
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MIR
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[MIRParser] Allow generic register specification on operand.
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2017-01-20 00:29:59 +00:00 |
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MSP430
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NVPTX
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[NVPTX] Add explicit check for llvm.sqrt.f32 to intrinsics.ll.
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2017-01-21 00:59:23 +00:00 |
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PowerPC
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[PowerPC] Expand ISEL instruction into if-then-else sequence.
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2017-01-16 20:12:26 +00:00 |
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SPARC
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Check for register clobbers when merging a vreg live range with a
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2017-01-13 19:08:36 +00:00 |
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SystemZ
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Fixed parser error on windows shell evaluation of RUN script line
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2017-01-18 11:40:28 +00:00 |
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Thumb
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Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
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2017-01-11 19:55:19 +00:00 |
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Thumb2
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ARM: match GCC's behaviour for builtins
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2017-01-13 16:25:33 +00:00 |
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WebAssembly
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[WebAssembly] Don't create bitcast-wrappers for varargs.
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2017-01-20 20:50:29 +00:00 |
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WinEH
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X86
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[x86] avoid crashing with illegal vector type (PR31672)
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2017-01-22 17:06:12 +00:00 |
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XCore
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