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98be3942ed
This is mostly achieved by providing the correct register class manually, because getRegClassFor always returns the GPR*AllRegClass for MVT::i32 and MVT::i64. Also cleanup the code to use the FastEmitInst_* method whenever possible. This makes sure that the operands' register class is properly constrained. For all the remaining cases this adds the missing constrainOperandRegClass calls for each operand. llvm-svn: 216225
149 lines
5.1 KiB
LLVM
149 lines
5.1 KiB
LLVM
; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -relocation-model=dynamic-no-pic -mtriple=arm64-apple-ios < %s | FileCheck %s --check-prefix=ARM64
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@message = global [80 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 16
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@temp = common global [80 x i8] zeroinitializer, align 16
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define void @t1() {
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; ARM64-LABEL: t1
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; ARM64: adrp x8, _message@PAGE
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; ARM64: add x0, x8, _message@PAGEOFF
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; ARM64: mov w9, wzr
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; ARM64: movz x2, #0x50
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; ARM64: uxtb w1, w9
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; ARM64: bl _memset
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call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i8 0, i64 80, i32 16, i1 false)
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ret void
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
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define void @t2() {
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; ARM64-LABEL: t2
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x0, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x8, _message@PAGE
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; ARM64: add x1, x8, _message@PAGEOFF
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; ARM64: movz x2, #0x50
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; ARM64: bl _memcpy
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 80, i32 16, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1)
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define void @t3() {
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; ARM64-LABEL: t3
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x0, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x8, _message@PAGE
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; ARM64: add x1, x8, _message@PAGEOFF
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; ARM64: movz x2, #0x14
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; ARM64: bl _memmove
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call void @llvm.memmove.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 20, i32 16, i1 false)
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ret void
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}
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declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1)
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define void @t4() {
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; ARM64-LABEL: t4
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x8, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x9, _message@PAGE
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; ARM64: add x9, x9, _message@PAGEOFF
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; ARM64: ldr x10, [x9]
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; ARM64: str x10, [x8]
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; ARM64: ldr x10, [x9, #8]
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; ARM64: str x10, [x8, #8]
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; ARM64: ldrb w11, [x9, #16]
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; ARM64: strb w11, [x8, #16]
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; ARM64: ret
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 17, i32 16, i1 false)
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ret void
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}
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define void @t5() {
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; ARM64-LABEL: t5
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x8, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x9, _message@PAGE
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; ARM64: add x9, x9, _message@PAGEOFF
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; ARM64: ldr x10, [x9]
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; ARM64: str x10, [x8]
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; ARM64: ldr x10, [x9, #8]
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; ARM64: str x10, [x8, #8]
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; ARM64: ldrb w11, [x9, #16]
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; ARM64: strb w11, [x8, #16]
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; ARM64: ret
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 17, i32 8, i1 false)
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ret void
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}
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define void @t6() {
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; ARM64-LABEL: t6
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x8, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x9, _message@PAGE
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; ARM64: add x9, x9, _message@PAGEOFF
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; ARM64: ldr w10, [x9]
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; ARM64: str w10, [x8]
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; ARM64: ldr w10, [x9, #4]
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; ARM64: str w10, [x8, #4]
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; ARM64: ldrb w10, [x9, #8]
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; ARM64: strb w10, [x8, #8]
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; ARM64: ret
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 9, i32 4, i1 false)
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ret void
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}
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define void @t7() {
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; ARM64-LABEL: t7
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x8, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x9, _message@PAGE
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; ARM64: add x9, x9, _message@PAGEOFF
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; ARM64: ldrh w10, [x9]
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; ARM64: strh w10, [x8]
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; ARM64: ldrh w10, [x9, #2]
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; ARM64: strh w10, [x8, #2]
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; ARM64: ldrh w10, [x9, #4]
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; ARM64: strh w10, [x8, #4]
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; ARM64: ldrb w10, [x9, #6]
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; ARM64: strb w10, [x8, #6]
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; ARM64: ret
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 7, i32 2, i1 false)
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ret void
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}
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define void @t8() {
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; ARM64-LABEL: t8
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x8, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x9, _message@PAGE
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; ARM64: add x9, x9, _message@PAGEOFF
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; ARM64: ldrb w10, [x9]
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; ARM64: strb w10, [x8]
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; ARM64: ldrb w10, [x9, #1]
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; ARM64: strb w10, [x8, #1]
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; ARM64: ldrb w10, [x9, #2]
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; ARM64: strb w10, [x8, #2]
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; ARM64: ldrb w10, [x9, #3]
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; ARM64: strb w10, [x8, #3]
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; ARM64: ret
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 4, i32 1, i1 false)
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ret void
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}
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define void @test_distant_memcpy(i8* %dst) {
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; ARM64-LABEL: test_distant_memcpy:
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; ARM64: mov [[ARRAY:x[0-9]+]], sp
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; ARM64: movz [[OFFSET:x[0-9]+]], #0x1f40
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; ARM64: add x[[ADDR:[0-9]+]], [[ARRAY]], [[OFFSET]]
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; ARM64: ldrb [[BYTE:w[0-9]+]], [x[[ADDR]]]
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; ARM64: strb [[BYTE]], [x0]
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%array = alloca i8, i32 8192
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%elem = getelementptr i8* %array, i32 8000
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %elem, i64 1, i32 1, i1 false)
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ret void
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}
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