Evandro Menezes 5d88cb6cf6 [AArch64] Generate literals by the little end ... ARM seems to prefer that long literals be formed from their little end in order to promote the fusion of the instrs pairs MOV/MOVK and MOVK/MOVK on Cortex A57 and others (v. "Cortex A57 Software Optimisation Guide", section 4.14). Differential revision: https://reviews.llvm.org/D28697 llvm-svn: 292422		2017-01-18 18:57:08 +00:00
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AArch64	[AArch64] Generate literals by the little end	2017-01-18 18:57:08 +00:00
AMDGPU	[AMDGPU] Do not allow register coalescer to create big superregs	2017-01-18 17:30:05 +00:00
ARM	Revert "[XRay][Arm] Repair XRay table emission on Arm32 and add tests to identify such problem earlier"	2017-01-18 09:08:43 +00:00
AVR
BPF	[bpf] error when unknown bpf helper is called	2017-01-17 07:26:17 +00:00
Generic	Reverted: Track validity of pass results	2017-01-15 10:23:18 +00:00
Hexagon
Inputs
Lanai
Mips	Reverted: Track validity of pass results	2017-01-15 10:23:18 +00:00
MIR	MIRParser: Allow regclass specification on operand	2017-01-18 00:59:19 +00:00
MSP430
NVPTX	[NVPTX] Support global variables of integer type larger than i64.	2017-01-18 00:29:53 +00:00
PowerPC	[PowerPC] Expand ISEL instruction into if-then-else sequence.	2017-01-16 20:12:26 +00:00
SPARC	Check for register clobbers when merging a vreg live range with a	2017-01-13 19:08:36 +00:00
SystemZ	Fixed parser error on windows shell evaluation of RUN script line	2017-01-18 11:40:28 +00:00
Thumb
Thumb2
WebAssembly	[WebAssembly] Update grow_memory's return type.	2017-01-18 01:02:45 +00:00
WinEH
X86	Don't create a comdat group for a dropped def with initializer	2017-01-18 16:58:43 +00:00
XCore