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d7f173214f
I'm doing this in two phases for a better "git blame" record. This commit removes the previous AArch64 backend and redirects all functionality to ARM64. It also deduplicates test-lines and removes orphaned AArch64 tests. The next step will be "git mv ARM64 AArch64" and rewire most of the tests. Hopefully LLVM is still functional, though it would be even better if no-one ever had to care because the rename happens straight afterwards. llvm-svn: 209576
36 lines
901 B
LLVM
36 lines
901 B
LLVM
; RUN: llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -o - %s | FileCheck %s
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; LLVM should be able to cope with multiple uses of the same flag-setting
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; instruction at different points of a routine. Either by rematerializing the
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; compare or by saving and restoring the flag register.
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declare void @bar()
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@var = global i32 0
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define i32 @test_multiflag(i32 %n, i32 %m, i32 %o) {
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; CHECK-LABEL: test_multiflag:
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%test = icmp ne i32 %n, %m
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; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
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%val = zext i1 %test to i32
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; CHECK: cset {{[xw][0-9]+}}, ne
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store i32 %val, i32* @var
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call void @bar()
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; CHECK: bl bar
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; Currently, the comparison is emitted again. An MSR/MRS pair would also be
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; acceptable, but assuming the call preserves NZCV is not.
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br i1 %test, label %iftrue, label %iffalse
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; CHECK: cmp [[LHS]], [[RHS]]
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; CHECK: b.eq
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iftrue:
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ret i32 42
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iffalse:
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ret i32 0
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}
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