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d7f173214f
I'm doing this in two phases for a better "git blame" record. This commit removes the previous AArch64 backend and redirects all functionality to ARM64. It also deduplicates test-lines and removes orphaned AArch64 tests. The next step will be "git mv ARM64 AArch64" and rewire most of the tests. Hopefully LLVM is still functional, though it would be even better if no-one ever had to care because the rename happens straight afterwards. llvm-svn: 209576
38 lines
1.2 KiB
LLVM
38 lines
1.2 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefix CHECK-ARM64
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; When generating DAG selection tables, TableGen used to only flag an
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; instruction as needing a chain on its own account if it had a built-in pattern
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; which used the chain. This meant that the AArch64 load/stores weren't
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; recognised and so both loads from %locvar below were coalesced into a single
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; LS8_LDR instruction (same operands other than the non-existent chain) and the
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; increment was lost at return.
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; This was obviously a Bad Thing.
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declare void @bar(i8*)
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define i64 @test_chains() {
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; CHECK-ARM64-LABEL: test_chains:
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%locvar = alloca i8
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call void @bar(i8* %locvar)
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; CHECK: bl {{_?bar}}
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%inc.1 = load i8* %locvar
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%inc.2 = zext i8 %inc.1 to i64
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%inc.3 = add i64 %inc.2, 1
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%inc.4 = trunc i64 %inc.3 to i8
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store i8 %inc.4, i8* %locvar
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; CHECK-ARM64: ldurb {{w[0-9]+}}, [x29, [[LOCADDR:#-?[0-9]+]]]
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; CHECK-ARM64: add {{w[0-9]+}}, {{w[0-9]+}}, #1
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; CHECK-ARM64: sturb {{w[0-9]+}}, [x29, [[LOCADDR]]]
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; CHECK-ARM64: ldurb {{w[0-9]+}}, [x29, [[LOCADDR]]]
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%ret.1 = load i8* %locvar
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%ret.2 = zext i8 %ret.1 to i64
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ret i64 %ret.2
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; CHECK-ARM64: ret
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}
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