mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-26 04:32:44 +01:00
98d913fa91
If we can't decide `shouldExpandAtomicCmpXchgInIR` or `shouldExpandAtomicCmpXchgInIR` in PPC's implementation after https://reviews.llvm.org/rGb9c3941cd61de1e1b9e4f3311ddfa92394475f4b, resort to base's implementation. This fixes internal build of OpenMP which uses atomic operations on float. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D106234
90 lines
3.1 KiB
LLVM
90 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
|
|
; RUN: < %s | FileCheck --check-prefix=CHECK-64 %s
|
|
; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-unknown \
|
|
; RUN: < %s | FileCheck --check-prefix=CHECK-32 %s
|
|
|
|
define float @test_add(float* %ptr, float %incr) {
|
|
; CHECK-64-LABEL: test_add:
|
|
; CHECK-64: # %bb.0: # %entry
|
|
; CHECK-64-NEXT: sync
|
|
; CHECK-64-NEXT: lfs 0, 0(3)
|
|
; CHECK-64-NEXT: b .LBB0_3
|
|
; CHECK-64-NEXT: .LBB0_1: # %atomicrmw.start
|
|
; CHECK-64-NEXT: #
|
|
; CHECK-64-NEXT: stwcx. 5, 0, 3
|
|
; CHECK-64-NEXT: .LBB0_2: # %atomicrmw.start
|
|
; CHECK-64-NEXT: #
|
|
; CHECK-64-NEXT: stw 5, -4(1)
|
|
; CHECK-64-NEXT: cmplw 5, 4
|
|
; CHECK-64-NEXT: lfs 0, -4(1)
|
|
; CHECK-64-NEXT: beq 0, .LBB0_6
|
|
; CHECK-64-NEXT: .LBB0_3: # %atomicrmw.start
|
|
; CHECK-64-NEXT: # =>This Loop Header: Depth=1
|
|
; CHECK-64-NEXT: # Child Loop BB0_4 Depth 2
|
|
; CHECK-64-NEXT: fadds 2, 0, 1
|
|
; CHECK-64-NEXT: stfs 2, -8(1)
|
|
; CHECK-64-NEXT: stfs 0, -12(1)
|
|
; CHECK-64-NEXT: lwz 6, -8(1)
|
|
; CHECK-64-NEXT: lwz 4, -12(1)
|
|
; CHECK-64-NEXT: .LBB0_4: # %atomicrmw.start
|
|
; CHECK-64-NEXT: # Parent Loop BB0_3 Depth=1
|
|
; CHECK-64-NEXT: # => This Inner Loop Header: Depth=2
|
|
; CHECK-64-NEXT: lwarx 5, 0, 3
|
|
; CHECK-64-NEXT: cmpw 4, 5
|
|
; CHECK-64-NEXT: bne 0, .LBB0_1
|
|
; CHECK-64-NEXT: # %bb.5: # %atomicrmw.start
|
|
; CHECK-64-NEXT: #
|
|
; CHECK-64-NEXT: stwcx. 6, 0, 3
|
|
; CHECK-64-NEXT: bne 0, .LBB0_4
|
|
; CHECK-64-NEXT: b .LBB0_2
|
|
; CHECK-64-NEXT: .LBB0_6: # %atomicrmw.end
|
|
; CHECK-64-NEXT: fmr 1, 0
|
|
; CHECK-64-NEXT: lwsync
|
|
; CHECK-64-NEXT: blr
|
|
;
|
|
; CHECK-32-LABEL: test_add:
|
|
; CHECK-32: # %bb.0: # %entry
|
|
; CHECK-32-NEXT: stwu 1, -32(1)
|
|
; CHECK-32-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-32-NEXT: sync
|
|
; CHECK-32-NEXT: lfs 0, 0(3)
|
|
; CHECK-32-NEXT: b .LBB0_3
|
|
; CHECK-32-NEXT: .LBB0_1: # %atomicrmw.start
|
|
; CHECK-32-NEXT: #
|
|
; CHECK-32-NEXT: stwcx. 5, 0, 3
|
|
; CHECK-32-NEXT: .LBB0_2: # %atomicrmw.start
|
|
; CHECK-32-NEXT: #
|
|
; CHECK-32-NEXT: stw 5, 28(1)
|
|
; CHECK-32-NEXT: cmplw 5, 4
|
|
; CHECK-32-NEXT: lfs 0, 28(1)
|
|
; CHECK-32-NEXT: beq 0, .LBB0_6
|
|
; CHECK-32-NEXT: .LBB0_3: # %atomicrmw.start
|
|
; CHECK-32-NEXT: # =>This Loop Header: Depth=1
|
|
; CHECK-32-NEXT: # Child Loop BB0_4 Depth 2
|
|
; CHECK-32-NEXT: fadds 2, 0, 1
|
|
; CHECK-32-NEXT: stfs 2, 24(1)
|
|
; CHECK-32-NEXT: stfs 0, 20(1)
|
|
; CHECK-32-NEXT: lwz 6, 24(1)
|
|
; CHECK-32-NEXT: lwz 4, 20(1)
|
|
; CHECK-32-NEXT: .LBB0_4: # %atomicrmw.start
|
|
; CHECK-32-NEXT: # Parent Loop BB0_3 Depth=1
|
|
; CHECK-32-NEXT: # => This Inner Loop Header: Depth=2
|
|
; CHECK-32-NEXT: lwarx 5, 0, 3
|
|
; CHECK-32-NEXT: cmpw 4, 5
|
|
; CHECK-32-NEXT: bne 0, .LBB0_1
|
|
; CHECK-32-NEXT: # %bb.5: # %atomicrmw.start
|
|
; CHECK-32-NEXT: #
|
|
; CHECK-32-NEXT: stwcx. 6, 0, 3
|
|
; CHECK-32-NEXT: bne 0, .LBB0_4
|
|
; CHECK-32-NEXT: b .LBB0_2
|
|
; CHECK-32-NEXT: .LBB0_6: # %atomicrmw.end
|
|
; CHECK-32-NEXT: fmr 1, 0
|
|
; CHECK-32-NEXT: lwsync
|
|
; CHECK-32-NEXT: addi 1, 1, 32
|
|
; CHECK-32-NEXT: blr
|
|
entry:
|
|
%r = atomicrmw fadd float* %ptr, float %incr seq_cst
|
|
ret float %r
|
|
}
|