1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/test/CodeGen/PowerPC/fma-mutate.ll
Jinsong Ji 4d8c0e830b [DAGCombine] reassoc flag shouldn't enable contract
According to IR LangRef, the FMF flag:

contract
Allow floating-point contraction (e.g. fusing a multiply followed by an
addition into a fused multiply-and-add).

reassoc
Allow reassociation transformations for floating-point instructions.
This may dramatically change results in floating-point.

My understanding is that these two flags shouldn't imply each other,
as we might have a SDNode that can be reassociated with others, but
not contractble.

eg: We may want following fmul/fad/fsub to freely reassoc, but don't
want fma being generated here.

   %F = fmul reassoc double %A, %B         ; <double> [#uses=1]
   %G = fmul reassoc double %C, %D         ; <double> [#uses=1]
   %H = fadd reassoc double %F, %G         ; <double> [#uses=1]
   %I = fsub reassoc double %H, %E         ; <double> [#uses=1]

Before https://reviews.llvm.org/D45710, `reassoc` flag actually
did not imply isContratable either.

The current implementation also only check the flag in fadd node,
ignoring fmul node, this patch update that as well.

Reviewed By: spatel, qiucf

Differential Revision: https://reviews.llvm.org/D104247
2021-06-21 21:15:43 +00:00

45 lines
1.4 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s
declare double @llvm.sqrt.f64(double)
; Test several VSX FMA mutation opportunities.
; This is reasonable transformation since it eliminates extra register copy.
define double @foo3_fmf(double %a) nounwind {
; CHECK-LABEL: foo3_fmf:
; CHECK: # %bb.0:
; CHECK-NEXT: xstsqrtdp 0, 1
; CHECK-NEXT: bc 12, 2, .LBB0_2
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: xsrsqrtedp 0, 1
; CHECK-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; CHECK-NEXT: lfs 3, .LCPI0_0@toc@l(3)
; CHECK-NEXT: addis 3, 2, .LCPI0_1@toc@ha
; CHECK-NEXT: lfs 4, .LCPI0_1@toc@l(3)
; CHECK-NEXT: xsmuldp 2, 1, 0
; CHECK-NEXT: xsmaddmdp 2, 0, 3
; CHECK-NEXT: xsmuldp 0, 0, 4
; CHECK-NEXT: xsmuldp 0, 0, 2
; CHECK-NEXT: xsmuldp 1, 1, 0
; CHECK-NEXT: xsmaddadp 3, 1, 0
; CHECK-NEXT: xsmuldp 0, 1, 4
; CHECK-NEXT: xsmuldp 1, 0, 3
; CHECK-NEXT: blr
; CHECK-NEXT: .LBB0_2:
; CHECK-NEXT: xssqrtdp 1, 1
; CHECK-NEXT: blr
%r = call contract reassoc afn ninf double @llvm.sqrt.f64(double %a)
ret double %r
}
define double @foo3_safe(double %a) nounwind {
; CHECK-LABEL: foo3_safe:
; CHECK: # %bb.0:
; CHECK-NEXT: xssqrtdp 1, 1
; CHECK-NEXT: blr
%r = call double @llvm.sqrt.f64(double %a)
ret double %r
}