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0b832ca92a
As part of the effort to improve AIX support, regression test coverage misses quite a lot for AIX subtarget. This patch adds AIX triple to those don't need extra change, and we can cover more cases in following commits. Reviewed By: steven.zhang Differential Revision: https://reviews.llvm.org/D94159
112 lines
2.5 KiB
LLVM
112 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s
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define i64 @ori_test_a(i64 %a) {
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; CHECK-LABEL: ori_test_a:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: ori 3, 3, 65535
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; CHECK-NEXT: oris 3, 3, 65535
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; CHECK-NEXT: blr
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entry:
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%or = or i64 %a, 4294967295
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ret i64 %or
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}
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define i64 @ori_test_b(i64 %a) {
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; CHECK-LABEL: ori_test_b:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: li 4, -1
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; CHECK-NEXT: rldimi 3, 4, 32, 31
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; CHECK-NEXT: blr
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entry:
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%or = or i64 %a, 4294967296
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ret i64 %or
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}
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define i64 @ori_test_c(i64 %a) {
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; CHECK-LABEL: ori_test_c:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: ori 3, 3, 65535
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; CHECK-NEXT: blr
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entry:
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%or = or i64 %a, 65535
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ret i64 %or
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}
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define i64 @ori_test_d(i64 %a) {
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; CHECK-LABEL: ori_test_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: oris 3, 3, 1
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; CHECK-NEXT: blr
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entry:
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%or = or i64 %a, 65536
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ret i64 %or
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}
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define zeroext i32 @ori_test_e(i32 zeroext %a) {
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; CHECK-LABEL: ori_test_e:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: ori 3, 3, 65535
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; CHECK-NEXT: oris 3, 3, 255
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; CHECK-NEXT: blr
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entry:
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%or = or i32 %a, 16777215
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ret i32 %or
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}
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define i64 @xori_test_a(i64 %a) {
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; CHECK-LABEL: xori_test_a:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xori 3, 3, 65535
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; CHECK-NEXT: xoris 3, 3, 65535
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; CHECK-NEXT: blr
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entry:
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%xor = xor i64 %a, 4294967295
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ret i64 %xor
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}
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define i64 @xori_test_b(i64 %a) {
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; CHECK-LABEL: xori_test_b:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: li 4, 1
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; CHECK-NEXT: rldic 4, 4, 32, 31
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; CHECK-NEXT: xor 3, 3, 4
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; CHECK-NEXT: blr
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entry:
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%xor = xor i64 %a, 4294967296
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ret i64 %xor
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}
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define i64 @xori_test_c(i64 %a) {
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; CHECK-LABEL: xori_test_c:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xori 3, 3, 65535
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; CHECK-NEXT: blr
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entry:
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%xor = xor i64 %a, 65535
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ret i64 %xor
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}
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define i64 @xori_test_d(i64 %a) {
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; CHECK-LABEL: xori_test_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xoris 3, 3, 1
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; CHECK-NEXT: blr
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entry:
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%xor = xor i64 %a, 65536
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ret i64 %xor
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}
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define zeroext i32 @xori_test_e(i32 zeroext %a) {
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; CHECK-LABEL: xori_test_e:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xori 3, 3, 65535
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; CHECK-NEXT: xoris 3, 3, 255
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; CHECK-NEXT: blr
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entry:
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%xor = xor i32 %a, 16777215
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ret i32 %xor
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}
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