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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 06:22:56 +02:00
llvm-mirror/test/CodeGen
2012-10-25 08:38:42 +00:00
..
ARM Fix a miscompilation caused by a typo. When turning a adde with negative value 2012-10-24 19:53:01 +00:00
CellSPU
CPP
Generic
Hexagon
MBlaze
Mips [mips] Make sure sret argument is returned in register V0. 2012-10-24 02:10:54 +00:00
MSP430 Fix fallout from RegInfo => FrameLowering refactoring on MSP430. 2012-10-17 17:37:11 +00:00
NVPTX
PowerPC This patch fixes failures in the SingleSource/Regression/C/uint64_to_float 2012-10-18 13:16:11 +00:00
SPARC
Thumb
Thumb2 Fix a miscompilation caused by a typo. When turning a adde with negative value 2012-10-24 19:53:01 +00:00
X86 The test avx-intel-ocl.ll failed. I can't reproduce on any of my machines. I added -mcpu flag, may be it will fix the problem 2012-10-25 08:38:42 +00:00
XCore